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Simple UART for FPGA v1.3

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@jakubcabal jakubcabal released this 10 Apr 12:41
v1.3
9aed72b
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Learn about vigilant mode.
  • Added better simulation with automatic checking of transactions.
  • Little code cleaning and code optimization.
  • Added UART2WB bridge example (access to WB registers via UART).
  • Added Parity Error output.
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