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Roger enable pm for ish5p8 #49

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Commits on Aug 7, 2024

  1. add pmu irq for ISH5.8

    HSD: 15015857053
    
    This commit is to add pmu irq number for ISH5.8.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  2. aon_task: refine sram retention flow

    HSD: 15015856980
    
    This commit is to refine sram retention flow.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  3. aon_task: enable sram retention flow for ish5.8

    HSD: 15015856980
    
    This commit is to enable sram retention flow for ISH5.8.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  4. aon_task: enable sram pg flow for ish5.8

    HSD: 15015856980
    
    This commit is to enable sram power on/off flow for ISH5.8.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  5. pm: enable d0i3 flow for ish5.8

    HSD: 15015857053
    
    This commit is to enable D0i3 flow for ISH5.8.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  6. pm: clear TCG and BCG disable bit in pm_init

    HSD: 15015857053
    
    This commit is to clear TCG and BCG disable bit in pm_init to make
    TCG can be achieved in D0i1 and first D0i2/D0i3 entry.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  7. pm: check pmu status register after d0ix exit

    HSD: 15015857053
    
    This commit is to check PMU_CG_PG_STATUS register after D0i1/2/3
    exit. And check more registers to print some debug information if
    CG_Abort happened.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  8. pm: enable unit test

    HSD: 15015857053
    
    This commit is to enable unit test for PM D0ix flow.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  9. pm: disable interrupt after exit from halt

    HSD: 15015857053
    
    This commit is to disable core interrupt after exit from halt,
    which is porting from ISH.
    We need to keep interrupt disabled until all necessary hardware
    context restoration is done.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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  10. pm: enable bcg for uart and i2c

    HSD: 15015857053
    
    This commit is to enable block level clock gating for UART and I2C
    controller.
    
    Signed-off-by: Roger Wang <[email protected]>
    roger1wang-intel committed Aug 7, 2024
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