pm: change irq vectors for pmu, pci, reset prep

Changes irq vectors for pmu, pci, reset preo to avoid conflict. Signed-off-by: Leifu Zhao <[email protected]>
intel · Aug 22, 2023 · b4e3331 · b4e3331
1 parent 6108bcc
commit b4e3331
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Showing 2 changed files with 6 additions and 6 deletions.
diff --git a/bsp_sedi/soc/intel_ish/pm/ish_pm.c b/bsp_sedi/soc/intel_ish/pm/ish_pm.c
@@ -568,9 +568,9 @@ void sedi_pm_init(void)
 	write32(PMU_ISH_FABRIC_CNT, (read32(PMU_ISH_FABRIC_CNT) & 0xffff0000) | FABRIC_IDLE_COUNT);
 	write32(PMU_PGCB_CLKGATE_CTRL, TRUNK_CLKGATE_COUNT);
 
-	IRQ_CONNECT(SEDI_IRQ_RESET_PREP, 2, reset_prep_isr, 0, IOAPIC_LEVEL);
-	IRQ_CONNECT(SEDI_IRQ_PMU2IOAPIC, 2, pmu_wakeup_isr, 0, IOAPIC_LEVEL);
-	IRQ_CONNECT(SEDI_IRQ_PCIEDEV, 2, pcie_dev_isr, 0, IOAPIC_LEVEL);
+	IRQ_CONNECT(SEDI_IRQ_RESET_PREP, 5, reset_prep_isr, 0, IOAPIC_LEVEL);
+	IRQ_CONNECT(SEDI_IRQ_PMU2IOAPIC, 5, pmu_wakeup_isr, 0, IOAPIC_LEVEL);
+	IRQ_CONNECT(SEDI_IRQ_PCIEDEV, 5, pcie_dev_isr, 0, IOAPIC_LEVEL);
 
 	/* unmask reset prep avail interrupt */
 	write32(PMU_RST_PREP, 0);

diff --git a/bsp_sedi/soc/intel_ish/pm/pm_regs.h b/bsp_sedi/soc/intel_ish/pm/pm_regs.h
@@ -215,9 +215,9 @@
 
 #define IOAPIC_NUM_RTES 64
 
-#define SEDI_VEC_RESET_PREP		64
-#define SEDI_VEC_PMU2IOAPIC		65
-#define SEDI_VEC_PCIEDEV		66
+#define SEDI_VEC_RESET_PREP		112
+#define SEDI_VEC_PMU2IOAPIC		113
+#define SEDI_VEC_PCIEDEV		114
 
 /* SRAM memory definitions */
 #define CONFIG_RAM_BASE			0xFF200000