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able to get 8 byte descriptor, but read(RCVBC) always return 0
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- rename max3421e to max3421
- fix incorrect bitmask for HCTL, fix initial device connect
- fix bus reset cause connect IRQ
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hathach committed Aug 23, 2023
1 parent 274578f commit e3f3179
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Showing 4 changed files with 206 additions and 102 deletions.
24 changes: 9 additions & 15 deletions hw/bsp/nrf/family.c
Original file line number Diff line number Diff line change
Expand Up @@ -93,7 +93,7 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
}

//------------- Host using MAX2341E -------------//
#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0);

void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
Expand All @@ -102,19 +102,17 @@ void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
tuh_int_handler(1);
}

static inline void max3421e_cs_assert(bool active) {
nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
}

//--------------------------------------------------------------------+
// API: SPI transfer with MAX3421E, must be implemented by application
//--------------------------------------------------------------------+

bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len,
uint8_t * rx_buf, size_t rx_len, bool keep_cs) {
void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
(void) rhport;
nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
}

max3421e_cs_assert(true);
bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len) {
(void) rhport;

nrfx_spim_xfer_desc_t xfer = {
.p_tx_buffer = tx_buf,
Expand All @@ -123,11 +121,7 @@ bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx
.rx_length = rx_len,
};

bool ret = (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);

if ( !keep_cs ) max3421e_cs_assert(false);

return ret;
return (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);
}

#endif
Expand Down Expand Up @@ -218,10 +212,10 @@ void board_init(void) {
if ( usb_reg & OUTPUTRDY_Msk ) tusb_hal_nrf_power_event(USB_EVT_READY);
#endif

#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
// manually manage CS
nrf_gpio_cfg_output(MAX3421E_CS_PIN);
max3421e_cs_assert(false);
tuh_max3421_spi_cs_api(0, false);

// USB host using max3421e usb controller via SPI
nrfx_spim_config_t cfg = {
Expand Down
2 changes: 1 addition & 1 deletion hw/bsp/nrf/family.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,7 @@ function(family_configure_example TARGET RTOS)
family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS})
target_sources(${TARGET}-tinyusb PUBLIC
${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
${TOP}/src/portable/analog/max3421e/hcd_max3421e.c
${TOP}/src/portable/analog/max3421/hcd_max3421.c
)
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})

Expand Down
2 changes: 1 addition & 1 deletion src/host/hcd.h
Original file line number Diff line number Diff line change
Expand Up @@ -170,7 +170,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr);
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);

// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);

// Abort a queued transfer. Note: it can only abort transfer that has not been started
// Return true if a queued transfer is aborted, false if there is no transfer to abort
Expand Down
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