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hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld
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/* | ||
****************************************************************************** | ||
** | ||
** File : LinkerScript.ld | ||
** | ||
** Author : STM32CubeIDE | ||
** | ||
** Abstract : Linker script for STM32U575xI Device from STM32U5 series | ||
** 2048Kbytes FLASH | ||
** 784Kbytes RAM | ||
** | ||
** Set heap size, stack size and stack location according | ||
** to application requirements. | ||
** | ||
** Set memory bank area and size if external memory is used. | ||
** | ||
** Target : STMicroelectronics STM32 | ||
** | ||
** Distribution: The file is distributed as is without any warranty | ||
** of any kind. | ||
** | ||
***************************************************************************** | ||
** @attention | ||
** | ||
** Copyright (c) 2022 STMicroelectronics. | ||
** All rights reserved. | ||
** | ||
** This software is licensed under terms that can be found in the LICENSE file | ||
** in the root directory of this software component. | ||
** If no LICENSE file comes with this software, it is provided AS-IS. | ||
** | ||
***************************************************************************** | ||
*/ | ||
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/* Entry Point */ | ||
ENTRY(Reset_Handler) | ||
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/* Highest address of the user mode stack */ | ||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ | ||
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_Min_Heap_Size = 0x200 ; /* required amount of heap */ | ||
_Min_Stack_Size = 0x400 ; /* required amount of stack */ | ||
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/* Memories definition */ | ||
MEMORY | ||
{ | ||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 768K | ||
SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K | ||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K | ||
} | ||
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/* Sections */ | ||
SECTIONS | ||
{ | ||
/* The startup code into "FLASH" Rom type memory */ | ||
.isr_vector : | ||
{ | ||
KEEP(*(.isr_vector)) /* Startup code */ | ||
} >FLASH | ||
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/* The program code and other data into "FLASH" Rom type memory */ | ||
.text : | ||
{ | ||
*(.text) /* .text sections (code) */ | ||
*(.text*) /* .text* sections (code) */ | ||
*(.glue_7) /* glue arm to thumb code */ | ||
*(.glue_7t) /* glue thumb to arm code */ | ||
*(.eh_frame) | ||
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KEEP (*(.init)) | ||
KEEP (*(.fini)) | ||
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_etext = .; /* define a global symbols at end of code */ | ||
} >FLASH | ||
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/* Constant data into "FLASH" Rom type memory */ | ||
.rodata : | ||
{ | ||
*(.rodata) /* .rodata sections (constants, strings, etc.) */ | ||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ | ||
} >FLASH | ||
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.ARM.extab : | ||
{ | ||
*(.ARM.extab* .gnu.linkonce.armextab.*) | ||
} >FLASH | ||
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.ARM : | ||
{ | ||
__exidx_start = .; | ||
*(.ARM.exidx*) | ||
__exidx_end = .; | ||
} >FLASH | ||
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.preinit_array : | ||
{ | ||
PROVIDE_HIDDEN (__preinit_array_start = .); | ||
KEEP (*(.preinit_array*)) | ||
PROVIDE_HIDDEN (__preinit_array_end = .); | ||
} >FLASH | ||
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.init_array : | ||
{ | ||
PROVIDE_HIDDEN (__init_array_start = .); | ||
KEEP (*(SORT(.init_array.*))) | ||
KEEP (*(.init_array*)) | ||
PROVIDE_HIDDEN (__init_array_end = .); | ||
} >FLASH | ||
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.fini_array : | ||
{ | ||
PROVIDE_HIDDEN (__fini_array_start = .); | ||
KEEP (*(SORT(.fini_array.*))) | ||
KEEP (*(.fini_array*)) | ||
PROVIDE_HIDDEN (__fini_array_end = .); | ||
} >FLASH | ||
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/* Used by the startup to initialize data */ | ||
_sidata = LOADADDR(.data); | ||
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/* Initialized data sections into "RAM" Ram type memory */ | ||
.data : | ||
{ | ||
_sdata = .; /* create a global symbol at data start */ | ||
*(.data) /* .data sections */ | ||
*(.data*) /* .data* sections */ | ||
*(.RamFunc) /* .RamFunc sections */ | ||
*(.RamFunc*) /* .RamFunc* sections */ | ||
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_edata = .; /* define a global symbol at data end */ | ||
} >RAM AT> FLASH | ||
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/* Uninitialized data section into "RAM" Ram type memory */ | ||
.bss : | ||
{ | ||
/* This is used by the startup in order to initialize the .bss section */ | ||
_sbss = .; /* define a global symbol at bss start */ | ||
__bss_start__ = _sbss; | ||
*(.bss) | ||
*(.bss*) | ||
*(COMMON) | ||
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_ebss = .; /* define a global symbol at bss end */ | ||
__bss_end__ = _ebss; | ||
} >RAM | ||
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/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ | ||
._user_heap_stack : | ||
{ | ||
. = ALIGN(8); | ||
PROVIDE ( end = . ); | ||
PROVIDE ( _end = . ); | ||
. = . + _Min_Heap_Size; | ||
. = . + _Min_Stack_Size; | ||
. = ALIGN(8); | ||
} >RAM | ||
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/* Remove information from the compiler libraries */ | ||
/DISCARD/ : | ||
{ | ||
libc.a ( * ) | ||
libm.a ( * ) | ||
libgcc.a ( * ) | ||
} | ||
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.ARM.attributes 0 : { *(.ARM.attributes) } | ||
} |
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/* | ||
* The MIT License (MIT) | ||
* | ||
* Copyright (c) 2023, Ha Thach (tinyusb.org) | ||
* | ||
* Permission is hereby granted, free of charge, to any person obtaining a copy | ||
* of this software and associated documentation files (the "Software"), to deal | ||
* in the Software without restriction, including without limitation the rights | ||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | ||
* copies of the Software, and to permit persons to whom the Software is | ||
* furnished to do so, subject to the following conditions: | ||
* | ||
* The above copyright notice and this permission notice shall be included in | ||
* all copies or substantial portions of the Software. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
* THE SOFTWARE. | ||
* | ||
* This file is part of the TinyUSB stack. | ||
*/ | ||
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#ifndef BOARD_H_ | ||
#define BOARD_H_ | ||
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#ifdef __cplusplus | ||
extern "C" | ||
{ | ||
#endif | ||
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// LED GREEN | ||
#define LED_PORT GPIOC | ||
#define LED_PIN GPIO_PIN_7 | ||
#define LED_STATE_ON 1 | ||
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// BUTTON | ||
#define BUTTON_PORT GPIOA | ||
#define BUTTON_PIN GPIO_PIN_0 | ||
#define BUTTON_STATE_ACTIVE 1 | ||
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// UART Enable for STLink VCOM | ||
#define UART_DEV LPUART1 | ||
#define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE | ||
#define UART_GPIO_PORT GPIOG | ||
#define UART_GPIO_AF GPIO_AF8_LPUART1 | ||
#define UART_TX_PIN GPIO_PIN_7 | ||
#define UART_RX_PIN GPIO_PIN_8 | ||
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//--------------------------------------------------------------------+ | ||
// RCC Clock | ||
//--------------------------------------------------------------------+ | ||
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static inline void board_clock_init(void) | ||
{ | ||
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RCC_OscInitTypeDef RCC_OscInitStruct = {0}; | ||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; | ||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; | ||
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/* Enable Power Clock*/ | ||
__HAL_RCC_PWR_CLK_ENABLE(); | ||
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/** Configure the main internal regulator output voltage | ||
*/ | ||
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); | ||
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/** Initializes the CPU, AHB and APB buses clocks | ||
*/ | ||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI; | ||
RCC_OscInitStruct.HSIState = RCC_HSI_ON; | ||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; | ||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; | ||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | ||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; | ||
RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; | ||
RCC_OscInitStruct.PLL.PLLM = 1; | ||
RCC_OscInitStruct.PLL.PLLN = 10; | ||
RCC_OscInitStruct.PLL.PLLP = 2; | ||
RCC_OscInitStruct.PLL.PLLQ = 2; | ||
RCC_OscInitStruct.PLL.PLLR = 1; | ||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1; | ||
RCC_OscInitStruct.PLL.PLLFRACN = 0; | ||
HAL_RCC_OscConfig(&RCC_OscInitStruct); | ||
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CLK48; | ||
PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48; | ||
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); | ||
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/** Initializes the CPU, AHB and APB buses clocks | ||
*/ | ||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; | ||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; | ||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; | ||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; | ||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; | ||
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; | ||
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); | ||
} | ||
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#ifdef __cplusplus | ||
} | ||
#endif | ||
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#endif /* BOARD_H_ */ |
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CFLAGS += \ | ||
-DSTM32U575xx \ | ||
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# All source paths should be relative to the top level. | ||
LD_FILE = $(BOARD_PATH)/STM32U575ZITXQ_FLASH.ld | ||
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s | ||
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# For flash-jlink target | ||
JLINK_DEVICE = stm32u575 |