target/arc: Update code for v8.1.5

Signed-off-by: Yuriy Kolerov <[email protected]>
foss-for-synopsys-dwc-arc-processors · Jul 12, 2024 · a40e352 · a40e352
1 parent f73f3f3
commit a40e352
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Showing 25 changed files with 8,275 additions and 8,288 deletions.
diff --git a/hw/arc/arc_sim.c b/hw/arc/arc_sim.c
@@ -103,7 +103,7 @@ static void arc_sim_init(MachineState *machine)
                            1024);
     memory_region_add_subregion(get_system_memory(), 0xf0000000, system_io);
 
-    if (semihosting_enabled()) {
+    if (semihosting_enabled(false)) {
         if (serial_hd(0)) {
             arc_sim_open_console(serial_hd(0));
         }

diff --git a/hw/arc/virt.c b/hw/arc/virt.c
@@ -14,6 +14,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/error-report.h"
 #include "qemu/units.h"
 #include "qapi/error.h"
 #include "boot.h"

diff --git a/target/arc/arc-semi.c b/target/arc/arc-semi.c
@@ -852,9 +852,9 @@ void do_arc_semihosting(CPUARCState *env)
 
     case TARGET_SYS_gettimeofday:
     {
-        qemu_timeval tv;
+        struct timeval tv;
         struct timeval p;
-        uint32_t result = qemu_gettimeofday(&tv);
+        uint32_t result = gettimeofday(&tv, NULL);
         arc_semihosting_errno = errno;
         target_ulong base = regs[0];
         uint32_t sz = sizeof (struct timeval);

diff --git a/target/arc/cpu.c b/target/arc/cpu.c
@@ -99,6 +99,16 @@ static void arc_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb
     env->pc = tb->pc;
 }
 
+static void arc_restore_state_to_opc(CPUState *cs,
+                                     const TranslationBlock *tb,
+                                     const uint64_t *data)
+{
+    ARCCPU *cpu = ARC_CPU(cs);
+    CPUARCState *env = &cpu->env;
+
+    env->pc = data[0];
+}
+
 static void arc_cpu_reset(DeviceState *dev)
 {
     CPUState *s = CPU(dev);
@@ -397,6 +407,7 @@ static const struct SysemuCPUOps arc_sysemu_ops = {
 static struct TCGCPUOps arc_tcg_ops = {
     .initialize = arc_translate_init,
     .synchronize_from_tb = arc_cpu_synchronize_from_tb,
+    .restore_state_to_opc = arc_restore_state_to_opc,
 
 #ifdef CONFIG_USER_ONLY
     .record_sigsegv = arc_cpu_record_sigsegv,

diff --git a/target/arc/cpu.h b/target/arc/cpu.h
@@ -184,7 +184,7 @@ FIELD(STATUS32, Zf,  11, 1)
     tcg_temp_free(temp); \
 }
 #define TCG_SET_STATUS_FIELD_IVALUE(STAT_REG, FIELD, IVALUE) { \
-    TCGv temp = tcg_const_tl((IVALUE << R_STATUS32_ ## FIELD ## _SHIFT) \
+    TCGv temp = tcg_constant_tl((IVALUE << R_STATUS32_ ## FIELD ## _SHIFT) \
                              & R_STATUS32_ ## FIELD ## _MASK); \
     tcg_gen_andi_tl(STAT_REG, STAT_REG, ~R_STATUS32_ ## FIELD ## _MASK); \
     tcg_gen_or_tl(STAT_REG, STAT_REG, temp); \
@@ -408,8 +408,8 @@ static inline int cpu_mmu_index(const CPUARCState *env, bool ifetch)
     return GET_STATUS_BIT(env->stat, Uf) != 0 ? 1 : 0;
 }
 
-static inline void cpu_get_tb_cpu_state(CPUARCState *env, target_ulong *pc,
-                                        target_ulong *cs_base,
+static inline void cpu_get_tb_cpu_state(CPUARCState *env, vaddr *pc,
+                                        uint64_t *cs_base,
                                         uint32_t *pflags)
 {
     *pc = env->pc;

diff --git a/target/arc/decoder-v2.c b/target/arc/decoder-v2.c
@@ -447,7 +447,7 @@ static const char *get_auxreg_v2(const struct arc_opcode *opcode,
             continue;
         }
 
-        if (auxr->subclass != NONE) {
+        if (auxr->subclass != ARC_INSN_SUBCLASS_NONE) {
             return NULL;
         }
 

diff --git a/target/arc/decoder-v3.c b/target/arc/decoder-v3.c
@@ -473,7 +473,7 @@ static const char *get_auxreg_v3(const struct arc_opcode *opcode,
             continue;
         }
 
-        if (auxr->subclass != NONE) {
+        if (auxr->subclass != ARC_INSN_SUBCLASS_NONE) {
             return NULL;
         }
 

diff --git a/target/arc/decoder.h b/target/arc/decoder.h
@@ -156,7 +156,7 @@ typedef enum {
 
 /* Instruction Subclass.  */
 typedef enum {
-    NONE     = 0,
+    ARC_INSN_SUBCLASS_NONE     = 0,
     CVT      = (1U << 1),
     BTSCN    = (1U << 2),
     CD       = (1U << 3),

diff --git a/target/arc/decoder_fragments/arc-tbl.h b/target/arc/decoder_fragments/arc-tbl.h
diff --git a/target/arc/decoder_fragments/arc64-tbl.h b/target/arc/decoder_fragments/arc64-tbl.h
diff --git a/target/arc/fpu-helper-v2.c b/target/arc/fpu-helper-v2.c
@@ -19,6 +19,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/error-report.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
 #include "exec/helper-proto.h"

diff --git a/target/arc/fpu.c b/target/arc/fpu.c
@@ -19,6 +19,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/error-report.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
 #include "exec/helper-proto.h"

diff --git a/target/arc/gdbstub.c b/target/arc/gdbstub.c
@@ -25,6 +25,7 @@
 #include "irq.h"
 #include "gdbstub.h"
 #include "mpu.h"
+#include "gdbstub/helpers.h"
 #include "exec/helper-proto.h"
 #include "fpu.h"
 

diff --git a/target/arc/helper.c b/target/arc/helper.c
@@ -66,7 +66,7 @@ void arc_cpu_do_interrupt(CPUState *cs)
      * semihosting enabled.
      */
     if (cs->exception_index == EXCP_SWI
-        && semihosting_enabled()) {
+        && semihosting_enabled(false)) {
         qemu_log_mask(CPU_LOG_INT, "Entering semihosting\n");
         do_arc_semihosting(env);
         /* Return to the next instruction. */
@@ -333,7 +333,7 @@ void helper_debug(CPUARCState *env)
 G_NORETURN void arc_raise_exception(CPUARCState *env, uintptr_t host_pc, int32_t excp_idx)
 {
     CPUState *cs = env_cpu(env);
-    cpu_restore_state(cs, host_pc, true);
+    cpu_restore_state(cs, host_pc);
     cs->exception_index = excp_idx;
     env->causecode = env->param = 0x0;
     env->eret  = env->pc;

diff --git a/target/arc/mmu-v6.c b/target/arc/mmu-v6.c
@@ -761,7 +761,7 @@ static G_NORETURN void raise_mem_exception(
 {
     CPUARCState *env = &(ARC_CPU(cs)->env);
     if (excp->number != EXCP_IMMU_FAULT) {
-        cpu_restore_state(cs, host_pc, true);
+        cpu_restore_state(cs, host_pc);
     }
 
     env->efa = addr;

diff --git a/target/arc/mmu.c b/target/arc/mmu.c
@@ -603,7 +603,7 @@ static G_NORETURN void raise_mem_exception(
 {
     CPUARCState *env = &(ARC_CPU(cs)->env);
     if (excp->number != EXCP_TLB_MISS_I) {
-        cpu_restore_state(cs, host_pc, true);
+        cpu_restore_state(cs, host_pc);
     }
 
     env->efa = addr;

diff --git a/target/arc/op_helper.c b/target/arc/op_helper.c
@@ -25,6 +25,7 @@
 #include "exec/helper-proto.h"
 #include "exec/cpu_ldst.h"
 #include "exec/ioport.h"
+#include "exec/tb-flush.h"
 #include "target/arc/regs.h"
 #include "mmu.h"
 #include "hw/arc/cpudevs.h"