Support coex esp32c6

Cargo.toml

@@ -36,6 +36,7 @@ esp32s2-hal = { version = "0.12.0" }
 smoltcp = { version = "0.10.0", default-features=false, features = ["proto-igmp", "proto-ipv4", "proto-dns", "socket-tcp", "socket-icmp", "socket-udp", "socket-dns", "medium-ethernet", "proto-dhcpv4", "socket-raw", "socket-dhcpv4"] }
 critical-section = "1.1.1"
 atomic-polyfill = "1.0.2"
+atomic_enum = "0.2.0" # uses core atomic types which should be fine as long as only load and store is used on them
 log = "0.4.18"
 embedded-svc = { version = "0.25.1", default-features = false, features = [] }
 enumset = { version = "1", default-features = false }

esp-wifi-sys/ld/esp32c6/rom_functions.x

@@ -1468,3 +1468,36 @@ phy_param_rom = 0x4087fce8;
 
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_crc32_le = crc32_le );
+
+/***************************************
+ Group rom_coexist
+ ***************************************/
+
+/* Functions */
+esp_coex_rom_version_get = 0x40000afc;
+coex_bt_release = 0x40000b00;
+coex_bt_request = 0x40000b04;
+coex_core_ble_conn_dyn_prio_get = 0x40000b08;
+coex_core_event_duration_get = 0x40000b0c;
+coex_core_pti_get = 0x40000b10;
+coex_core_release = 0x40000b14;
+coex_core_request = 0x40000b18;
+coex_core_status_get = 0x40000b1c;
+coex_core_timer_idx_get = 0x40000b20;
+coex_event_duration_get = 0x40000b24;
+coex_hw_timer_disable = 0x40000b28;
+coex_hw_timer_enable = 0x40000b2c;
+coex_hw_timer_set = 0x40000b30;
+coex_schm_interval_set = 0x40000b34;
+coex_schm_lock = 0x40000b38;
+coex_schm_unlock = 0x40000b3c;
+coex_status_get = 0x40000b40;
+coex_wifi_release = 0x40000b44;
+esp_coex_ble_conn_dynamic_prio_get = 0x40000b48;
+/* Data (.data, .bss, .rodata) */
+coex_env_ptr = 0x4087ffc4;
+coex_pti_tab_ptr = 0x4087ffc0;
+coex_schm_env_ptr = 0x4087ffbc;
+coexist_funcs = 0x4087ffb8;
+g_coa_funcs_p = 0x4087ffb4;
+g_coex_param_ptr = 0x4087ffb0;

esp-wifi/Cargo.toml

@@ -14,7 +14,6 @@ esp32s3-hal = { workspace = true, optional = true }
 esp32s2-hal = { workspace = true, optional = true }
 smoltcp = { workspace = true, optional = true }
 critical-section.workspace = true
-atomic-polyfill.workspace = true
 log = { workspace = true, optional = true }
 embedded-svc = { workspace = true, optional = true }
 enumset = { workspace = true, optional = true }
@@ -31,6 +30,8 @@ embassy-net-driver = { workspace = true, optional = true }
 toml-cfg.workspace = true
 libm.workspace = true
 cfg-if.workspace = true
+atomic-polyfill = { workspace = true }
+atomic_enum = { workspace = true }
 
 [features]
 default = [ "utils", "log" ]

esp-wifi/src/ble/npl.rs

@@ -36,15 +36,15 @@ struct Callout {
     timer_handle: u32,
 }
 
-static mut CALLOUTS: [Option<Callout>; 12] = [None; 12];
-static mut CALLOUT_TIMERS: [ets_timer; 12] = [ets_timer {
+static mut CALLOUTS: [Option<Callout>; 20] = [None; 20];
+static mut CALLOUT_TIMERS: [ets_timer; 20] = [ets_timer {
     next: core::ptr::null_mut(),
     expire: 0,
     period: 0,
     func: None,
     priv_: core::ptr::null_mut(),
-}; 12];
-static mut CALLOUT_EVENTS: [u32; 12] = [0u32; 12];
+}; 20];
+static mut CALLOUT_EVENTS: [u32; 20] = [0u32; 20];
 
 #[derive(Copy, Clone, Default)]
 struct Event {
@@ -1075,11 +1075,13 @@ pub(crate) fn ble_init() {
 
         // init bb
         bt_bb_v2_init_cmplx(1);
-
-        // let rc = ble_osi_coex_funcs_register(&G_COEX_FUNCS as *const osi_coex_funcs_t);
-        // if res != 0 {
-        //     panic!("ble_osi_coex_funcs_register returned {}", res);
-        // }
+        #[cfg(coex)]
+        {
+            let rc = ble_osi_coex_funcs_register(&G_COEX_FUNCS as *const osi_coex_funcs_t);
+            if rc != 0 {
+                panic!("ble_osi_coex_funcs_register returned {}", rc);
+            }
+        }
 
         let res = ble_controller_init(&cfg as *const esp_bt_controller_config_t);
 

esp-wifi/src/ble/os_adapter_esp32c6.rs

@@ -19,11 +19,11 @@ pub(crate) static BLE_CONFIG: esp_bt_controller_config_t = esp_bt_controller_con
     ble_hci_evt_hi_buf_count: 30,
     ble_hci_evt_lo_buf_count: 8,
     ble_ll_sync_list_cnt: 5,
-    ble_ll_sync_cnt: 20,
+    ble_ll_sync_cnt: 1,
     ble_ll_rsp_dup_list_count: 20,
     ble_ll_adv_dup_list_count: 20,
     ble_ll_tx_pwr_dbm: 9,
-    rtc_freq: 32000,
+    rtc_freq: 32768,
     ble_ll_sca: 60,
     ble_ll_scan_phy_number: 1,
     ble_ll_conn_def_auth_pyld_tmo: 3000,
@@ -34,15 +34,15 @@ pub(crate) static BLE_CONFIG: esp_bt_controller_config_t = esp_bt_controller_con
     ble_scan_rsp_data_max_len: 31,
     ble_ll_cfg_num_hci_cmd_pkts: 1,
     ble_ll_ctrl_proc_timeout_ms: 40000,
-    nimble_max_connections: 2,
+    nimble_max_connections: 3,
     ble_whitelist_size: 12,
-    ble_acl_buf_size: 255,
-    ble_acl_buf_count: 24,
+    ble_acl_buf_size: 517,
+    ble_acl_buf_count: 10,
     ble_hci_evt_buf_size: 70,
     ble_multi_adv_instances: 1,
     ble_ext_adv_max_size: 31,
-    controller_task_stack_size: 4096,
-    controller_task_prio: 253,
+    controller_task_stack_size: 5120,
+    controller_task_prio: 5,
     controller_run_cpu: 0,
     enable_qa_test: 0,
     enable_bqb_test: 0,
@@ -58,7 +58,7 @@ pub(crate) static BLE_CONFIG: esp_bt_controller_config_t = esp_bt_controller_con
     sleep_en: 0,
     coex_phy_coded_tx_rx_time_limit: 0,
     dis_scan_backoff: 0,
-    ble_scan_classify_filter_enable: 0,
+    ble_scan_classify_filter_enable: 1,
     cca_drop_mode: 0,  //???
     cca_low_tx_pwr: 0, //???
     main_xtal_freq: 40,

esp-wifi/src/common_adapter/common_adapter_esp32.rs

@@ -3,9 +3,11 @@ use crate::binary::include::*;
 use crate::common_adapter::RADIO_CLOCKS;
 use crate::hal::system::RadioClockController;
 use crate::hal::system::RadioPeripherals;
-use atomic_polyfill::AtomicU32;
 use esp32_hal::prelude::ram;
 
+use atomic_polyfill::AtomicU32;
+use core::sync::atomic::Ordering;
+
 const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
 
 static mut SOC_PHY_DIG_REGS_MEM: [u8; SOC_PHY_DIG_REGS_MEM_SIZE] = [0u8; SOC_PHY_DIG_REGS_MEM_SIZE];
@@ -36,7 +38,7 @@ pub(crate) fn phy_mem_init() {
 }
 
 pub(crate) unsafe fn phy_enable() {
-    let count = PHY_ACCESS_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             // #if CONFIG_IDF_TARGET_ESP32
@@ -77,7 +79,7 @@ pub(crate) unsafe fn phy_enable() {
 
 #[allow(unused)]
 pub(crate) unsafe fn phy_disable() {
-    let count = PHY_ACCESS_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             phy_digital_regs_store();
@@ -116,7 +118,7 @@ fn phy_digital_regs_store() {
 pub(crate) unsafe fn phy_enable_clock() {
     trace!("phy_enable_clock");
 
-    let count = PHY_CLOCK_ENABLE_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_CLOCK_ENABLE_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             unwrap!(RADIO_CLOCKS.as_mut()).enable(RadioPeripherals::Phy);
@@ -128,7 +130,7 @@ pub(crate) unsafe fn phy_enable_clock() {
 pub(crate) unsafe fn phy_disable_clock() {
     trace!("phy_disable_clock");
 
-    let count = PHY_CLOCK_ENABLE_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_CLOCK_ENABLE_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             unwrap!(RADIO_CLOCKS.as_mut()).disable(RadioPeripherals::Phy);

esp-wifi/src/common_adapter/common_adapter_esp32c2.rs

@@ -4,7 +4,9 @@ use crate::common_adapter::RADIO_CLOCKS;
 use crate::compat::common::str_from_c;
 use crate::hal::system::RadioClockController;
 use crate::hal::system::RadioPeripherals;
+
 use atomic_polyfill::AtomicU32;
+use core::sync::atomic::Ordering;
 
 const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
 
@@ -26,7 +28,7 @@ pub(crate) fn phy_mem_init() {
 }
 
 pub(crate) unsafe fn phy_enable() {
-    let count = PHY_ACCESS_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             phy_enable_clock();
@@ -77,7 +79,7 @@ pub(crate) unsafe fn phy_enable() {
 
 #[allow(unused)]
 pub(crate) unsafe fn phy_disable() {
-    let count = PHY_ACCESS_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             phy_digital_regs_store();

esp-wifi/src/common_adapter/common_adapter_esp32c3.rs

@@ -4,7 +4,9 @@ use crate::common_adapter::RADIO_CLOCKS;
 use crate::compat::common::str_from_c;
 use crate::hal::system::RadioClockController;
 use crate::hal::system::RadioPeripherals;
+
 use atomic_polyfill::AtomicU32;
+use core::sync::atomic::Ordering;
 
 const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
 
@@ -61,7 +63,7 @@ pub(crate) fn phy_mem_init() {
 }
 
 pub(crate) unsafe fn phy_enable() {
-    let count = PHY_ACCESS_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             phy_enable_clock();
@@ -112,7 +114,7 @@ pub(crate) unsafe fn phy_enable() {
 
 #[allow(unused)]
 pub(crate) unsafe fn phy_disable() {
-    let count = PHY_ACCESS_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             phy_digital_regs_store();

esp-wifi/src/common_adapter/common_adapter_esp32c6.rs

@@ -4,7 +4,9 @@ use crate::common_adapter::RADIO_CLOCKS;
 use crate::compat::common::str_from_c;
 use crate::hal::system::RadioClockController;
 use crate::hal::system::RadioPeripherals;
+
 use atomic_polyfill::AtomicU32;
+use core::sync::atomic::Ordering;
 
 const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
 
@@ -26,7 +28,7 @@ pub(crate) fn phy_mem_init() {
 }
 
 pub(crate) unsafe fn phy_enable() {
-    let count = PHY_ACCESS_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             phy_enable_clock();
@@ -76,7 +78,7 @@ pub(crate) unsafe fn phy_enable() {
 
 #[allow(unused)]
 pub(crate) unsafe fn phy_disable() {
-    let count = PHY_ACCESS_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             phy_digital_regs_store();

esp-wifi/src/common_adapter/common_adapter_esp32s2.rs

@@ -3,9 +3,11 @@ use crate::binary::include::*;
 use crate::common_adapter::RADIO_CLOCKS;
 use crate::hal::system::RadioClockController;
 use crate::hal::system::RadioPeripherals;
-use atomic_polyfill::AtomicU32;
 use esp32s2_hal::prelude::ram;
 
+use atomic_polyfill::AtomicU32;
+use core::sync::atomic::Ordering;
+
 const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
 
 static mut SOC_PHY_DIG_REGS_MEM: [u8; SOC_PHY_DIG_REGS_MEM_SIZE] = [0u8; SOC_PHY_DIG_REGS_MEM_SIZE];
@@ -59,7 +61,7 @@ pub(crate) fn phy_mem_init() {
 }
 
 pub(crate) unsafe fn phy_enable() {
-    let count = PHY_ACCESS_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             phy_enable_clock();
@@ -96,7 +98,7 @@ pub(crate) unsafe fn phy_enable() {
 
 #[allow(unused)]
 pub(crate) unsafe fn phy_disable() {
-    let count = PHY_ACCESS_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             phy_digital_regs_store();
@@ -130,7 +132,7 @@ fn phy_digital_regs_store() {
 }
 
 pub(crate) unsafe fn phy_enable_clock() {
-    let count = PHY_CLOCK_ENABLE_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_CLOCK_ENABLE_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             unwrap!(RADIO_CLOCKS.as_mut()).enable(RadioPeripherals::Phy);
@@ -142,7 +144,7 @@ pub(crate) unsafe fn phy_enable_clock() {
 
 #[allow(unused)]
 pub(crate) unsafe fn phy_disable_clock() {
-    let count = PHY_CLOCK_ENABLE_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_CLOCK_ENABLE_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             unwrap!(RADIO_CLOCKS.as_mut()).disable(RadioPeripherals::Phy);

esp-wifi/src/common_adapter/common_adapter_esp32s3.rs

@@ -3,7 +3,9 @@ use crate::binary::include::*;
 use crate::common_adapter::RADIO_CLOCKS;
 use crate::hal::system::RadioClockController;
 use crate::hal::system::RadioPeripherals;
+
 use atomic_polyfill::AtomicU32;
+use core::sync::atomic::Ordering;
 
 const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
 
@@ -60,7 +62,7 @@ pub(crate) fn enable_wifi_power_domain() {
 }
 
 pub(crate) unsafe fn phy_enable() {
-    let count = PHY_ACCESS_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_add(1, Ordering::SeqCst);
     if count == 0 {
         critical_section::with(|_| {
             phy_enable_clock();
@@ -108,7 +110,7 @@ pub(crate) unsafe fn phy_enable() {
 
 #[allow(unused)]
 pub(crate) unsafe fn phy_disable() {
-    let count = PHY_ACCESS_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    let count = PHY_ACCESS_REF.fetch_sub(1, Ordering::SeqCst);
     if count == 1 {
         critical_section::with(|_| {
             phy_digital_regs_store();

esp-wifi/src/compat/timer_compat.rs

@@ -18,7 +18,7 @@ pub struct Timer {
     pub arg_ptr: *mut c_types::c_void,
 }
 
-pub static mut TIMERS: [Option<Timer>; 20] = [None; 20];
+pub static mut TIMERS: [Option<Timer>; 40] = [None; 40];
 
 pub fn compat_timer_arm(ptimer: *mut c_types::c_void, tmout: u32, repeat: bool) {
     compat_timer_arm_us(ptimer, tmout * 1000, repeat);

esp-wifi/src/esp_now/mod.rs

@@ -7,9 +7,11 @@
 //! For more information see https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/network/esp_now.html
 
 use core::marker::PhantomData;
+use core::sync::atomic::Ordering;
 use core::{cell::RefCell, fmt::Debug};
 
-use atomic_polyfill::{AtomicBool, AtomicU8, Ordering};
+use atomic_polyfill::{AtomicBool, AtomicU8};
+
 use critical_section::Mutex;
 
 use crate::compat::queue::SimpleQueue;

esp-wifi/src/lib.rs

@@ -82,7 +82,7 @@ pub fn current_millis() -> u64 {
 
 #[allow(unused)]
 #[cfg(all(not(feature = "big-heap")))]
-const DEFAULT_HEAP_SIZE: usize = 64 * 1024;
+const DEFAULT_HEAP_SIZE: usize = 64 * 2048;
 
 #[allow(unused)]
 #[cfg(all(not(esp32s2), feature = "big-heap"))]

esp-wifi/src/preempt/mod.rs

@@ -1,4 +1,5 @@
-use atomic_polyfill::*;
+use atomic_polyfill::AtomicBool;
+use core::sync::atomic::Ordering;
 
 pub static mut FIRST_SWITCH: AtomicBool = AtomicBool::new(true);