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Enable vsnprintf on compilers newer than 1.73.0.1 (#293)
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* Add compiler version check for VaListImpl support

* Raise log level of puts
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bugadani authored Oct 20, 2023
1 parent d275696 commit 992832c
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Showing 4 changed files with 65 additions and 23 deletions.
58 changes: 58 additions & 0 deletions esp-wifi/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,41 @@ fn main() -> Result<(), String> {
#[cfg(feature = "coex")]
println!("cargo:rustc-cfg=coex");

let version_output = std::process::Command::new(
std::env::var_os("RUSTC").unwrap_or_else(|| std::ffi::OsString::from("rustc")),
)
.arg("-V")
.output()
.unwrap()
.stdout;
let version_string = String::from_utf8_lossy(&version_output);

// HACK: we detect the xtensa-enabled compiler by existence of the second version string in parens
// - upstream output format: rustc 1.75.0-nightly (cae0791da 2023-10-05)
// - xtensa output format: rustc 1.73.0-nightly (9163a2087 2023-10-03) (1.73.0.0)
if version_string.chars().filter(|&c| c == '(').count() == 2 {
let version = version_string
.split('(')
.last()
.unwrap()
.split(')')
.next()
.unwrap();

let mut version = version.split('.');

let major = version.next().unwrap().parse::<u32>().unwrap();
let minor = version.next().unwrap().parse::<u32>().unwrap();
let patch = version.next().unwrap().parse::<u32>().unwrap();
let release = version.next().unwrap().parse::<u32>().unwrap();

let version = Version4(major, minor, patch, release);

if version >= Version4(1, 73, 0, 1) {
println!("cargo:rustc-cfg=xtensa_has_vaarg");
}
}

Ok(())
}

Expand All @@ -57,3 +92,26 @@ fn main() -> Result<(), String> {
fn main() {
panic!("Select a chip via it's cargo feature");
}

use std::cmp::Ordering;

#[derive(Debug, Clone, Copy, PartialEq)]
struct Version4(u32, u32, u32, u32);

impl PartialOrd for Version4 {
fn partial_cmp(&self, other: &Self) -> Option<Ordering> {
match self.0.partial_cmp(&other.0) {
Some(Ordering::Equal) => {}
ord => return ord,
}
match self.1.partial_cmp(&other.1) {
Some(Ordering::Equal) => {}
ord => return ord,
}
match self.2.partial_cmp(&other.2) {
Some(Ordering::Equal) => {}
ord => return ord,
}
self.3.partial_cmp(&other.3)
}
}
2 changes: 1 addition & 1 deletion esp-wifi/src/common_adapter/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -319,7 +319,7 @@ pub(crate) unsafe extern "C" fn semphr_give_from_isr(sem: *const (), hptw: *cons
#[no_mangle]
pub unsafe extern "C" fn puts(s: *const u8) {
let cstr = str_from_c(s);
trace!("{}", cstr);
info!("{}", cstr);
}

#[no_mangle]
Expand Down
6 changes: 3 additions & 3 deletions esp-wifi/src/compat/common.rs
Original file line number Diff line number Diff line change
Expand Up @@ -106,15 +106,15 @@ pub unsafe fn str_from_c<'a>(s: *const u8) -> &'a str {

pub unsafe extern "C" fn syslog(_priority: u32, format: *const u8, mut args: VaListImpl) {
#[cfg(feature = "wifi-logs")]
{
#[cfg(target_arch = "riscv32")]
cfg_if::cfg_if! {
if #[cfg(any(target_arch = "riscv32", all(target_arch = "xtensa", xtensa_has_vaarg)))]
{
let mut buf = [0u8; 512];
vsnprintf(&mut buf as *mut u8, 512, format, args);
let res_str = str_from_c(&buf as *const u8);
info!("{}", res_str);
}
#[cfg(not(target_arch = "riscv32"))]
else
{
let res_str = str_from_c(format);
info!("{}", res_str);
Expand Down
22 changes: 3 additions & 19 deletions esp-wifi/src/wifi/os_adapter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,6 @@ use crate::{
timer::yield_task,
};

#[cfg(target_arch = "riscv32")]
use crate::compat::common::syslog;

use super::WifiEvent;
Expand Down Expand Up @@ -1508,10 +1507,7 @@ pub unsafe extern "C" fn log_write(
_format: *const crate::binary::c_types::c_char,
_args: ...
) {
#[cfg(not(feature = "wifi-logs"))]
return;

#[cfg(target_arch = "riscv32")]
let _args = core::mem::transmute(_args);
syslog(_level, _format as *const u8, _args);
}

Expand All @@ -1538,20 +1534,8 @@ pub unsafe extern "C" fn log_writev(
_format: *const crate::binary::c_types::c_char,
_args: va_list,
) {
#[cfg(feature = "wifi-logs")]
{
#[cfg(target_arch = "xtensa")]
{
let s = str_from_c(_format as *const u8);
info!("{}", s);
}

#[cfg(target_arch = "riscv32")]
{
let _args = core::mem::transmute(_args);
syslog(_level, _format as *const u8, _args);
}
}
let _args = core::mem::transmute(_args);
syslog(_level, _format as *const u8, _args);
}

/****************************************************************************
Expand Down

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