Adding missing peripherals and registers

+ fixing access mode

esp32c3/src/fe.rs

@@ -0,0 +1,18 @@
+#[repr(C)]
+#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
+#[doc = "Register block"]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0x90],
+    gen_ctrl: GEN_CTRL,
+}
+impl RegisterBlock {
+    #[doc = "0x90 - FE General Control Register"]
+    #[inline(always)]
+    pub const fn gen_ctrl(&self) -> &GEN_CTRL {
+        &self.gen_ctrl
+    }
+}
+#[doc = "GEN_CTRL (rw) register accessor: FE General Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gen_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gen_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gen_ctrl`] module"]
+pub type GEN_CTRL = crate::Reg<gen_ctrl::GEN_CTRL_SPEC>;
+#[doc = "FE General Control Register"]
+pub mod gen_ctrl;

esp32c3/src/fe/gen_ctrl.rs

@@ -0,0 +1,64 @@
+#[doc = "Register `GEN_CTRL` reader"]
+pub type R = crate::R<GEN_CTRL_SPEC>;
+#[doc = "Register `GEN_CTRL` writer"]
+pub type W = crate::W<GEN_CTRL_SPEC>;
+#[doc = "Field `IQ_EST_FORCE_PD` reader - Force Power Down for IQ Estimation"]
+pub type IQ_EST_FORCE_PD_R = crate::BitReader;
+#[doc = "Field `IQ_EST_FORCE_PD` writer - Force Power Down for IQ Estimation"]
+pub type IQ_EST_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `IQ_EST_FORCE_PU` reader - Force Power Up for IQ Estimation"]
+pub type IQ_EST_FORCE_PU_R = crate::BitReader;
+#[doc = "Field `IQ_EST_FORCE_PU` writer - Force Power Up for IQ Estimation"]
+pub type IQ_EST_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 4 - Force Power Down for IQ Estimation"]
+    #[inline(always)]
+    pub fn iq_est_force_pd(&self) -> IQ_EST_FORCE_PD_R {
+        IQ_EST_FORCE_PD_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - Force Power Up for IQ Estimation"]
+    #[inline(always)]
+    pub fn iq_est_force_pu(&self) -> IQ_EST_FORCE_PU_R {
+        IQ_EST_FORCE_PU_R::new(((self.bits >> 5) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("GEN_CTRL")
+            .field("iq_est_force_pu", &self.iq_est_force_pu())
+            .field("iq_est_force_pd", &self.iq_est_force_pd())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 4 - Force Power Down for IQ Estimation"]
+    #[inline(always)]
+    #[must_use]
+    pub fn iq_est_force_pd(&mut self) -> IQ_EST_FORCE_PD_W<GEN_CTRL_SPEC> {
+        IQ_EST_FORCE_PD_W::new(self, 4)
+    }
+    #[doc = "Bit 5 - Force Power Up for IQ Estimation"]
+    #[inline(always)]
+    #[must_use]
+    pub fn iq_est_force_pu(&mut self) -> IQ_EST_FORCE_PU_W<GEN_CTRL_SPEC> {
+        IQ_EST_FORCE_PU_W::new(self, 5)
+    }
+}
+#[doc = "FE General Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gen_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gen_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct GEN_CTRL_SPEC;
+impl crate::RegisterSpec for GEN_CTRL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [`gen_ctrl::R`](R) reader structure"]
+impl crate::Readable for GEN_CTRL_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`gen_ctrl::W`](W) writer structure"]
+impl crate::Writable for GEN_CTRL_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
+}
+#[doc = "`reset()` method sets GEN_CTRL to value 0"]
+impl crate::Resettable for GEN_CTRL_SPEC {
+    const RESET_VALUE: u8 = 0;
+}

esp32c3/src/fe2.rs

@@ -0,0 +1,18 @@
+#[repr(C)]
+#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
+#[doc = "Register block"]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0xf0],
+    tx_interp_ctrl: TX_INTERP_CTRL,
+}
+impl RegisterBlock {
+    #[doc = "0xf0 - FE2 TX Interpolation Control Register"]
+    #[inline(always)]
+    pub const fn tx_interp_ctrl(&self) -> &TX_INTERP_CTRL {
+        &self.tx_interp_ctrl
+    }
+}
+#[doc = "TX_INTERP_CTRL (rw) register accessor: FE2 TX Interpolation Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_interp_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_interp_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_interp_ctrl`] module"]
+pub type TX_INTERP_CTRL = crate::Reg<tx_interp_ctrl::TX_INTERP_CTRL_SPEC>;
+#[doc = "FE2 TX Interpolation Control Register"]
+pub mod tx_interp_ctrl;

esp32c3/src/fe2/tx_interp_ctrl.rs

@@ -0,0 +1,64 @@
+#[doc = "Register `TX_INTERP_CTRL` reader"]
+pub type R = crate::R<TX_INTERP_CTRL_SPEC>;
+#[doc = "Register `TX_INTERP_CTRL` writer"]
+pub type W = crate::W<TX_INTERP_CTRL_SPEC>;
+#[doc = "Field `TX_INF_FORCE_PD` reader - Force Power Down field"]
+pub type TX_INF_FORCE_PD_R = crate::BitReader;
+#[doc = "Field `TX_INF_FORCE_PD` writer - Force Power Down field"]
+pub type TX_INF_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `TX_INF_FORCE_PU` reader - Force Power Up field"]
+pub type TX_INF_FORCE_PU_R = crate::BitReader;
+#[doc = "Field `TX_INF_FORCE_PU` writer - Force Power Up field"]
+pub type TX_INF_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 9 - Force Power Down field"]
+    #[inline(always)]
+    pub fn tx_inf_force_pd(&self) -> TX_INF_FORCE_PD_R {
+        TX_INF_FORCE_PD_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bit 10 - Force Power Up field"]
+    #[inline(always)]
+    pub fn tx_inf_force_pu(&self) -> TX_INF_FORCE_PU_R {
+        TX_INF_FORCE_PU_R::new(((self.bits >> 10) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("TX_INTERP_CTRL")
+            .field("tx_inf_force_pu", &self.tx_inf_force_pu())
+            .field("tx_inf_force_pd", &self.tx_inf_force_pd())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 9 - Force Power Down field"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tx_inf_force_pd(&mut self) -> TX_INF_FORCE_PD_W<TX_INTERP_CTRL_SPEC> {
+        TX_INF_FORCE_PD_W::new(self, 9)
+    }
+    #[doc = "Bit 10 - Force Power Up field"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tx_inf_force_pu(&mut self) -> TX_INF_FORCE_PU_W<TX_INTERP_CTRL_SPEC> {
+        TX_INF_FORCE_PU_W::new(self, 10)
+    }
+}
+#[doc = "FE2 TX Interpolation Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_interp_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_interp_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct TX_INTERP_CTRL_SPEC;
+impl crate::RegisterSpec for TX_INTERP_CTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`tx_interp_ctrl::R`](R) reader structure"]
+impl crate::Readable for TX_INTERP_CTRL_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`tx_interp_ctrl::W`](W) writer structure"]
+impl crate::Writable for TX_INTERP_CTRL_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets TX_INTERP_CTRL to value 0"]
+impl crate::Resettable for TX_INTERP_CTRL_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

esp32c3/src/lib.rs

@@ -1909,6 +1909,144 @@ impl core::fmt::Debug for XTS_AES {
 }
 #[doc = "XTS-AES-128 Flash Encryption"]
 pub mod xts_aes;
+#[doc = "NRX Peripheral"]
+pub struct NRX {
+    _marker: PhantomData<*const ()>,
+}
+unsafe impl Send for NRX {}
+impl NRX {
+    #[doc = r"Pointer to the register block"]
+    pub const PTR: *const nrx::RegisterBlock = 0x6001_cc00 as *const _;
+    #[doc = r"Return the pointer to the register block"]
+    #[inline(always)]
+    pub const fn ptr() -> *const nrx::RegisterBlock {
+        Self::PTR
+    }
+    #[doc = r" Steal an instance of this peripheral"]
+    #[doc = r""]
+    #[doc = r" # Safety"]
+    #[doc = r""]
+    #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"]
+    #[doc = r" that may race with any existing instances, for example by only"]
+    #[doc = r" accessing read-only or write-only registers, or by consuming the"]
+    #[doc = r" original peripheral and using critical sections to coordinate"]
+    #[doc = r" access between multiple new instances."]
+    #[doc = r""]
+    #[doc = r" Additionally, other software such as HALs may rely on only one"]
+    #[doc = r" peripheral instance existing to ensure memory safety; ensure"]
+    #[doc = r" no stolen instances are passed to such software."]
+    pub unsafe fn steal() -> Self {
+        Self {
+            _marker: PhantomData,
+        }
+    }
+}
+impl Deref for NRX {
+    type Target = nrx::RegisterBlock;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*Self::PTR }
+    }
+}
+impl core::fmt::Debug for NRX {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("NRX").finish()
+    }
+}
+#[doc = "NRX Peripheral"]
+pub mod nrx;
+#[doc = "need des"]
+pub struct FE {
+    _marker: PhantomData<*const ()>,
+}
+unsafe impl Send for FE {}
+impl FE {
+    #[doc = r"Pointer to the register block"]
+    pub const PTR: *const fe::RegisterBlock = 0x6000_6000 as *const _;
+    #[doc = r"Return the pointer to the register block"]
+    #[inline(always)]
+    pub const fn ptr() -> *const fe::RegisterBlock {
+        Self::PTR
+    }
+    #[doc = r" Steal an instance of this peripheral"]
+    #[doc = r""]
+    #[doc = r" # Safety"]
+    #[doc = r""]
+    #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"]
+    #[doc = r" that may race with any existing instances, for example by only"]
+    #[doc = r" accessing read-only or write-only registers, or by consuming the"]
+    #[doc = r" original peripheral and using critical sections to coordinate"]
+    #[doc = r" access between multiple new instances."]
+    #[doc = r""]
+    #[doc = r" Additionally, other software such as HALs may rely on only one"]
+    #[doc = r" peripheral instance existing to ensure memory safety; ensure"]
+    #[doc = r" no stolen instances are passed to such software."]
+    pub unsafe fn steal() -> Self {
+        Self {
+            _marker: PhantomData,
+        }
+    }
+}
+impl Deref for FE {
+    type Target = fe::RegisterBlock;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*Self::PTR }
+    }
+}
+impl core::fmt::Debug for FE {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("FE").finish()
+    }
+}
+#[doc = "need des"]
+pub mod fe;
+#[doc = "need des"]
+pub struct FE2 {
+    _marker: PhantomData<*const ()>,
+}
+unsafe impl Send for FE2 {}
+impl FE2 {
+    #[doc = r"Pointer to the register block"]
+    pub const PTR: *const fe2::RegisterBlock = 0x6000_5000 as *const _;
+    #[doc = r"Return the pointer to the register block"]
+    #[inline(always)]
+    pub const fn ptr() -> *const fe2::RegisterBlock {
+        Self::PTR
+    }
+    #[doc = r" Steal an instance of this peripheral"]
+    #[doc = r""]
+    #[doc = r" # Safety"]
+    #[doc = r""]
+    #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"]
+    #[doc = r" that may race with any existing instances, for example by only"]
+    #[doc = r" accessing read-only or write-only registers, or by consuming the"]
+    #[doc = r" original peripheral and using critical sections to coordinate"]
+    #[doc = r" access between multiple new instances."]
+    #[doc = r""]
+    #[doc = r" Additionally, other software such as HALs may rely on only one"]
+    #[doc = r" peripheral instance existing to ensure memory safety; ensure"]
+    #[doc = r" no stolen instances are passed to such software."]
+    pub unsafe fn steal() -> Self {
+        Self {
+            _marker: PhantomData,
+        }
+    }
+}
+impl Deref for FE2 {
+    type Target = fe2::RegisterBlock;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*Self::PTR }
+    }
+}
+impl core::fmt::Debug for FE2 {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("FE2").finish()
+    }
+}
+#[doc = "need des"]
+pub mod fe2;
 #[no_mangle]
 static mut DEVICE_PERIPHERALS: bool = false;
 #[doc = r" All the peripherals."]
@@ -1988,6 +2126,12 @@ pub struct Peripherals {
     pub USB_DEVICE: USB_DEVICE,
     #[doc = "XTS_AES"]
     pub XTS_AES: XTS_AES,
+    #[doc = "NRX"]
+    pub NRX: NRX,
+    #[doc = "FE"]
+    pub FE: FE,
+    #[doc = "FE2"]
+    pub FE2: FE2,
 }
 impl Peripherals {
     #[doc = r" Returns all the peripherals *once*."]
@@ -2047,6 +2191,9 @@ impl Peripherals {
             UHCI1: UHCI1::steal(),
             USB_DEVICE: USB_DEVICE::steal(),
             XTS_AES: XTS_AES::steal(),
+            NRX: NRX::steal(),
+            FE: FE::steal(),
+            FE2: FE2::steal(),
         }
     }
 }

esp32c3/src/nrx.rs

@@ -0,0 +1,18 @@
+#[repr(C)]
+#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
+#[doc = "Register block"]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0xd4],
+    nrxpd_ctrl: NRXPD_CTRL,
+}
+impl RegisterBlock {
+    #[doc = "0xd4 - NRX Power Down Control Register"]
+    #[inline(always)]
+    pub const fn nrxpd_ctrl(&self) -> &NRXPD_CTRL {
+        &self.nrxpd_ctrl
+    }
+}
+#[doc = "NRXPD_CTRL (rw) register accessor: NRX Power Down Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nrxpd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nrxpd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nrxpd_ctrl`] module"]
+pub type NRXPD_CTRL = crate::Reg<nrxpd_ctrl::NRXPD_CTRL_SPEC>;
+#[doc = "NRX Power Down Control Register"]
+pub mod nrxpd_ctrl;