add pad extra inputs and outputs

Makefile

@@ -43,6 +43,8 @@ X_HEEP_CFG  ?= configs/general.hjson
 PAD_CFG  	?= pad_cfg.hjson
 EXT_PAD_CFG ?=
 
+PAD_RING_TEMPLATE ?= hw/system/pad_ring.sv.tpl
+
 # Compiler options are 'gcc' (default) and 'clang'
 COMPILER ?= gcc
 
@@ -107,7 +109,7 @@ mcu-gen:
 	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir hw/core-v-mini-mcu/ --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --tpl-sv hw/core-v-mini-mcu/memory_subsystem.sv.tpl
 	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir hw/core-v-mini-mcu/ --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --tpl-sv hw/core-v-mini-mcu/peripheral_subsystem.sv.tpl
 	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir tb/ --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --tpl-sv tb/tb_util.svh.tpl
-	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir hw/system/ --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --tpl-sv hw/system/pad_ring.sv.tpl
+	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir hw/system/ --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --tpl-sv $(PAD_RING_TEMPLATE)
 	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir hw/core-v-mini-mcu/ --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --tpl-sv hw/core-v-mini-mcu/core_v_mini_mcu.sv.tpl
 	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir hw/system/ --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --tpl-sv hw/system/x_heep_system.sv.tpl
 	$(PYTHON) util/mcu_gen.py --config $(X_HEEP_CFG) --cfg_peripherals $(MCU_CFG_PERIPHERALS) --pads_cfg $(PAD_CFG) --outdir sw/device/lib/runtime --cpu $(CPU) --bus $(BUS) --memorybanks $(MEMORY_BANKS) --memorybanks_il $(MEMORY_BANKS_IL) --external_domains $(EXTERNAL_DOMAINS) --header-c sw/device/lib/runtime/core_v_mini_mcu.h.tpl

hw/fpga/pad_cell_bypass_input_xilinx.sv

@@ -3,13 +3,22 @@
 // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 
 module pad_cell_bypass_input #(
-    parameter PADATTR = 16
+    parameter PADATTR = 16,
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
+    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
+    //do not touch these parameters
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   assign pad_out_o = pad_io;

hw/fpga/pad_cell_bypass_output_xilinx.sv

@@ -3,13 +3,22 @@
 // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 
 module pad_cell_bypass_output #(
-    parameter PADATTR = 16
+    parameter PADATTR = 16,
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
+    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
+    //do not touch these parameters
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   assign pad_out_o = 1'b0;

hw/fpga/pad_cell_inout_xilinx.sv

@@ -4,13 +4,21 @@
 
 module pad_cell_inout #(
     parameter PADATTR = 16,
-    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
+    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
+    //do not touch these parameters
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   IOBUF xilinx_iobuf_i (

hw/fpga/pad_cell_input_xilinx.sv

@@ -4,13 +4,21 @@
 
 module pad_cell_input #(
     parameter PADATTR = 16,
-    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
+    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
+    //do not touch these parameters
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   assign pad_out_o = pad_io;

hw/fpga/pad_cell_output_xilinx.sv

@@ -4,13 +4,21 @@
 
 module pad_cell_output #(
     parameter PADATTR = 16,
-    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
+    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
+    //do not touch these parameters
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   assign pad_out_o = 1'b0;

hw/simulation/pad_cell_bypass_input.sv

@@ -5,14 +5,23 @@
 /* verilator lint_off UNUSED */
 module pad_cell_bypass_input #(
     parameter PADATTR = 16,
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
+    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
     //do not touch these parameters
-    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout logic pad_io,
-    input logic [PADATTR_RND-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    /* verilator lint_off UNDRIVEN */
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
+
 );
 
   // when ported to another technology, they remain like this

hw/simulation/pad_cell_bypass_output.sv

@@ -5,14 +5,22 @@
 /* verilator lint_off UNUSED */
 module pad_cell_bypass_output #(
     parameter PADATTR = 16,
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
+    parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
     //do not touch these parameters
-    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout logic pad_io,
-    input logic [PADATTR_RND-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    /* verilator lint_off UNDRIVEN */
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   logic pad;

hw/simulation/pad_cell_inout.sv

@@ -5,15 +5,22 @@
 /* verilator lint_off UNUSED */
 module pad_cell_inout #(
     parameter PADATTR = 16,
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
     parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
     //do not touch these parameters
-    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout wire pad_io,
-    input logic [PADATTR_RND-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    /* verilator lint_off UNDRIVEN */
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   logic pad;

hw/simulation/pad_cell_input.sv

@@ -5,15 +5,22 @@
 /* verilator lint_off UNUSED */
 module pad_cell_input #(
     parameter PADATTR = 16,
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
     parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
     //do not touch these parameters
-    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout wire pad_io,
-    input logic [PADATTR_RND-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    /* verilator lint_off UNDRIVEN */
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
 );
 
   logic pad;

hw/simulation/pad_cell_output.sv

@@ -5,15 +5,23 @@
 /* verilator lint_off UNUSED */
 module pad_cell_output #(
     parameter PADATTR = 16,
+    parameter EXTRA_INPUTS = 4,
+    parameter EXTRA_OUTPUTS = 4,
     parameter core_v_mini_mcu_pkg::pad_side_e SIDE = core_v_mini_mcu_pkg::TOP,
     //do not touch these parameters
-    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR
+    parameter PADATTR_RND = PADATTR == 0 ? 1 : PADATTR,
+    parameter EXTRA_INPUTS_RND = EXTRA_INPUTS == 0 ? 1 : EXTRA_INPUTS,
+    parameter EXTRA_OUTPUTS_RND = EXTRA_OUTPUTS == 0 ? 1 : EXTRA_OUTPUTS
 ) (
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
     inout wire pad_io,
-    input logic [PADATTR_RND-1:0] pad_attributes_i
+    input logic [PADATTR_RND-1:0] pad_attributes_i,
+    input logic [EXTRA_INPUTS_RND-1:0] pad_extra_inputs_i,
+    /* verilator lint_off UNDRIVEN */
+    output logic [EXTRA_OUTPUTS_RND-1:0] pad_extra_outputs_o
+
 );
 
   logic pad;

hw/system/pad_ring.sv.tpl

@@ -14,11 +14,23 @@ ${external_pad.pad_ring_ctrl_interface}
 % endfor
 
 % if pads_attributes != None:
-    input logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][${pads_attributes['bits']}] pad_attributes_i
+    input logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][${pads_attributes['bits']}] pad_attributes_i,
 % else:
     // here just for simplicity
     /* verilator lint_off UNUSED */
-    input logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][0:0] pad_attributes_i
+    input logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][0:0] pad_attributes_i,
+% endif
+% if pads_extra_inputs != None:
+    input logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][${pads_extra_inputs['bits']}] pad_extra_inputs_i,
+% else:
+   /* verilator lint_off UNUSED */
+    input logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][0:0] pad_extra_inputs_i,
+% endif
+% if pads_extra_outputs != None:
+    output logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][${pads_extra_outputs['bits']}] pad_extra_outputs_o
+% else:
+   /* verilator lint_off UNDRIVEN */
+    output logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][0:0] pad_extra_outputs_o
 % endif
 
 );

hw/system/x_heep_system.sv.tpl

@@ -94,6 +94,15 @@ ${pad.x_heep_system_interface}
  % if total_pad_muxed > 0:
   logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][${max_total_pad_mux_bitlengh-1}:0] pad_muxes;
 % endif
+% if pads_attributes != None:
+  /* verilator lint_off UNUSED */
+  logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][${pads_extra_inputs['bits']}] pad_extra_inputs;
+% endif
+% if pads_attributes != None:
+  /* verilator lint_off UNUSED */
+  logic [core_v_mini_mcu_pkg::NUM_PAD-1:0][${pads_extra_outputs['bits']}] pad_extra_outputs;
+% endif
+
 
   logic rst_ngen;
 
@@ -165,9 +174,19 @@ ${pad.core_v_mini_mcu_bonding}
 ${pad.pad_ring_bonding_bonding}
 % endfor
 % if pads_attributes != None:
-    .pad_attributes_i(pad_attributes)
+    .pad_attributes_i(pad_attributes),
+% else:
+    .pad_attributes_i('0),
+% endif
+% if pads_extra_inputs != None:
+    .pad_extra_inputs_i(pad_extra_inputs),
+% else:
+    .pad_extra_inputs_i('0),
+% endif
+% if pads_extra_outputs != None:
+    .pad_extra_outputs_o(pad_extra_outputs)
 % else:
-    .pad_attributes_i('0)
+    .pad_extra_outputs_o()
 % endif
   );
 

pad_cfg.hjson

@@ -17,11 +17,17 @@
 //    skip_declaration: <True|False> (optional) - skip the declaration of the pad in the top level (default False)
 //    keep_internal: <True|False> (optional) - keep the pad internal to the design (default False)
 // 
-// Add this field at the same level of pads (not inside) if you want to define PADs attributes
+// Add these fields at the same level of pads (not inside) if you want to define PADs attributes, extra inputs, and extra outputs
 //    attributes: {
 //        bits: 7:0
 //        resval: 0x3
 //    },
+//    extra_inputs: {
+//        bits: 5:0
+//    },
+//    extra_outputs: {
+//        bits: 2:0
+//    },
 
 {