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Fixes issue with extra assigned addressmaps in ZCU102
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    - Auto assigned addresses introduced earlier lead to issues with
    extra address segments of the MPSoC processing system
    - Added ignore addresses feature to enable system specific ignores
    from auto assignment
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jahofmann committed Jun 12, 2019
1 parent 9d65318 commit b5dd38b
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Showing 7 changed files with 70 additions and 44 deletions.
1 change: 1 addition & 0 deletions common/common_2018.1.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -4,3 +4,4 @@ dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.1"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.2"
1 change: 1 addition & 0 deletions common/common_2018.2.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -4,3 +4,4 @@ dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.1"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.2"
1 change: 1 addition & 0 deletions common/common_2018.3.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -4,3 +4,4 @@ dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.2"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.2"
1 change: 1 addition & 0 deletions common/common_2019.1.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -4,3 +4,4 @@ dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.2"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.3"
83 changes: 44 additions & 39 deletions platform/common/addressmap.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -144,56 +144,61 @@ namespace eval addressmap {
proc construct_address_map {{map ""}} {
if {$map == ""} { set map [::platform::get_address_map [::platform::get_pe_base_address]] }
set map [apply_address_map_mods $map]
set ignored [::platform::get_ignored_segments]
set seg_i 0
foreach space [get_bd_addr_spaces] {
puts "space: $space"
set intfs [get_bd_intf_pins -quiet -of_objects $space -filter { MODE == Master }]
foreach intf $intfs {
set segs [get_bd_addr_segs -addressables -of_objects $intf]
foreach seg $segs {
puts " seg: $seg"
set sintf [get_bd_intf_pins -quiet -of_objects $seg]
if {[catch {dict get $map $intf}]} {
if {[catch {dict get $map $sintf}]} {
puts " neither $intf nor $sintf were found in address map for $seg: $::errorInfo"
puts " assuming internal connection, setting values as found in segment:"
set range [get_property RANGE $seg]
if {$range eq ""} {
puts " found no range on segment $seg, setting to max"
report_property $seg
set range [expr "1 << 64"]
}
puts " range: $range"
set offset [get_property OFFSET $seg]
if {$offset eq ""} {
puts " found no offset on segment $seg, setting to zero"
report_property $seg
set offset 0
if {[lsearch $ignored $seg] >= 0 } {
puts "Skipping ignored segment $seg"
} else {
puts " seg: $seg"
set sintf [get_bd_intf_pins -quiet -of_objects $seg]
if {[catch {dict get $map $intf}]} {
if {[catch {dict get $map $sintf}]} {
puts " neither $intf nor $sintf were found in address map for $seg: $::errorInfo"
puts " assuming internal connection, setting values as found in segment:"
set range [get_property RANGE $seg]
if {$range eq ""} {
puts " found no range on segment $seg, setting to max"
report_property $seg
set range [expr "1 << 64"]
}
puts " range: $range"
set offset [get_property OFFSET $seg]
if {$offset eq ""} {
puts " found no offset on segment $seg, setting to zero"
report_property $seg
set offset 0
}
puts " offset: $offset"
set me [dict create "range" $range "offset" $offset "space" $space seg "$seg"]
} else {
set me [dict get $map $sintf]
}
puts " offset: $offset"
set me [dict create "range" $range "offset" $offset "space" $space seg "$seg"]
} else {
set me [dict get $map $sintf]
set me [dict get $map $intf]
}
} else {
set me [dict get $map $intf]
puts " address map info: $me]"
set range [expr "max([dict get $me range], 4096)"]
set offset [expr "max([dict get $me "offset"], [get_property OFFSET $intf])"]
set range [expr "min($range, [get_property RANGE $intf])"]
puts " range: $range"
puts " offset: $offset"
puts " space: $space"
puts " seg: $seg"
if {[expr "(1 << 64) == $range"]} { set range "16E" }
create_bd_addr_seg \
-offset $offset \
-range $range \
$space \
$seg \
[format "AM_SEG_%03d" $seg_i]
incr seg_i
}
puts " address map info: $me]"
set range [expr "max([dict get $me range], 4096)"]
set offset [expr "max([dict get $me "offset"], [get_property OFFSET $intf])"]
set range [expr "min($range, [get_property RANGE $intf])"]
puts " range: $range"
puts " offset: $offset"
puts " space: $space"
puts " seg: $seg"
if {[expr "(1 << 64) == $range"]} { set range "16E" }
create_bd_addr_seg \
-offset $offset \
-range $range \
$space \
$seg \
[format "AM_SEG_%03d" $seg_i]
incr seg_i
}
}
}
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6 changes: 6 additions & 0 deletions platform/common/platform.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -276,4 +276,10 @@ namespace eval platform {
proc number_of_interrupt_controllers {} {
error "Platform does not implement mandatory proc number_of_interrupt_controllers!"
}

proc get_ignored_segments { } {
set ignored [list]
puts "Platform does not specify any ignored segments."
return $ignored
}
}
21 changes: 16 additions & 5 deletions platform/zynqmp/zynqmp.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -21,9 +21,8 @@
# are instantiated, depending on the number interrupt sources returned by the architecture.
# @author Jaco A. Hofmann, TU Darmstadt ([email protected])
#
# check if TAPASCO_HOME env var is set
if {![info exists ::env(TAPASCO_HOME)]} {
puts "Could not find TaPaSCo root directory, please set environment variable 'TAPASCO_HOME'."
if { [::tapasco::vivado_is_newer "2018.1"] == 0 } {
puts "Vivado [version -short] is too old to support MPSoC."
exit 1
}

Expand Down Expand Up @@ -59,11 +58,22 @@
}
if {$base != "skip"} { set peam [addressmap::assign_address $peam $m $base $stride $range $comp] }
}
assign_bd_address [get_bd_addr_segs {host/zynqmp/SAXIGP2/HP0_DDR_HIGH }]
assign_bd_address [get_bd_addr_segs {host/zynqmp/SAXIGP4/HP2_DDR_HIGH }]
return $peam
}

proc get_ignored_segments { } {
set ignored [list]
lappend ignored "/host/zynqmp/SAXIGP2/HP0_DDR_LOW"
lappend ignored "/host/zynqmp/SAXIGP2/HP0_LPS_OCM"
lappend ignored "/host/zynqmp/SAXIGP2/HP0_PCIE_LOW"
lappend ignored "/host/zynqmp/SAXIGP2/HP0_QSPI"
lappend ignored "/host/zynqmp/SAXIGP4/HP2_DDR_LOW"
lappend ignored "/host/zynqmp/SAXIGP4/HP2_LPS_OCM"
lappend ignored "/host/zynqmp/SAXIGP4/HP2_PCIE_LOW"
lappend ignored "/host/zynqmp/SAXIGP4/HP2_QSPI"
return $ignored
}

proc number_of_interrupt_controllers {} {
set no_pes [llength [arch::get_processing_elements]]
return [expr "$no_pes > 96 ? 4 : ($no_pes > 64 ? 3 : ($no_pes > 32 ? 2 : 1))"]
Expand Down Expand Up @@ -317,6 +327,7 @@
[get_bd_pins -of_objects $bic -filter { TYPE == rst && DIR == I && NAME =~ "S00_ARESETN" }]
}


# generate PS MPSoC instance. Default values are fine
set ps [tapasco::ip::create_ultra_ps "zynqmp" [tapasco::get_board_preset] [tapasco::get_design_frequency]]

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