nv2a: move endianness swapping to separate global handlers instead of…

… inside each engine

src/hw/cmos.cpp

@@ -135,7 +135,6 @@ template<bool log>
 void cmos::write(uint32_t addr, const uint8_t data)
 {
 	if constexpr (log) {
-		uint8_t value = data;
 		log_io_write();
 	}
 

src/hw/pci.cpp

@@ -14,7 +14,6 @@ template<bool log>
 void pci::write8(uint32_t addr, const uint8_t data)
 {
 	if constexpr (log) {
-		uint8_t value = data;
 		log_io_write();
 	}
 
@@ -135,7 +134,6 @@ template<bool log>
 void pci::write16(uint32_t addr, const uint16_t data)
 {
 	if constexpr (log) {
-		uint16_t value = data;
 		log_io_write();
 	}
 
@@ -147,7 +145,6 @@ template<bool log>
 void pci::write32(uint32_t addr, const uint32_t data)
 {
 	if constexpr (log) {
-		uint32_t value = data;
 		log_io_write();
 	}
 

src/hw/pic.cpp

@@ -235,7 +235,6 @@ template<bool log>
 void pic::write(uint32_t addr, const uint8_t data)
 {
 	if constexpr (log) {
-		uint8_t value = data;
 		log_io_write();
 	}
 
@@ -288,7 +287,6 @@ template<bool log>
 void pic::write_elcr(uint32_t addr, const uint8_t data)
 {
 	if constexpr (log) {
-		uint8_t value = data;
 		log_io_write();
 	}
 

src/hw/pit.cpp

@@ -53,7 +53,6 @@ template<bool log>
 void pit::write(uint32_t addr, const uint8_t data)
 {
 	if constexpr (log) {
-		uint8_t value = data;
 		log_io_write();
 	}
 

src/hw/video/gpu/nv2a.hpp

@@ -14,6 +14,7 @@
 #include "pfifo.hpp"
 #include "pvga.hpp"
 #include "pvideo.hpp"
+#include "cpu.hpp"
 
 #define NV2A_CLOCK_FREQ 233333324 // = 233 MHz
 #define NV2A_CRYSTAL_FREQ 16666666 // = 16 MHz
@@ -54,3 +55,22 @@ class nv2a {
 	pvga m_pvga;
 	pvideo m_pvideo;
 };
+
+template<typename D, typename T, auto f, bool is_be = false, uint32_t base = 0>
+T nv2a_read(uint32_t addr, void *opaque)
+{
+	T value = cpu_read<D, T, f, base>(addr, opaque);
+	if constexpr (is_be) {
+		value = util::byteswap<T>(value);
+	}
+	return value;
+}
+
+template<typename D, typename T, auto f, bool is_be = false, uint32_t base = 0>
+void nv2a_write(uint32_t addr, T value, void *opaque)
+{
+	if constexpr (is_be) {
+		value = util::byteswap<T>(value);
+	}
+	cpu_write<D, T, f, base>(addr, value, opaque);
+}

src/hw/video/gpu/pbus.cpp

@@ -90,29 +90,25 @@ nv2a_pci_write(uint8_t *ptr, uint8_t addr, uint8_t data, void *opaque)
 	return 0; // pass-through the write
 }
 
-template<bool should_log, bool is_be>
+template<bool log>
 void pbus::write(uint32_t addr, const uint32_t data)
 {
-	uint32_t value = data;
-	if constexpr (is_be) {
-		value = util::byteswap(value);
-	}
-	if constexpr (should_log) {
+	if constexpr (log) {
 		log_io_write();
 	}
 
 	switch (addr)
 	{
 	case NV_PBUS_FBIO_RAM:
-		fbio_ram = value;
+		fbio_ram = data;
 		break;
 
 	default:
-		nxbx_fatal("Unhandled write at address 0x%" PRIX32 " with value 0x%" PRIX32, addr, value);
+		nxbx_fatal("Unhandled write at address 0x%" PRIX32 " with value 0x%" PRIX32, addr, data);
 	}
 }
 
-template<bool should_log, bool is_be>
+template<bool log>
 uint32_t pbus::read(uint32_t addr)
 {
 	uint32_t value = 0;
@@ -127,41 +123,31 @@ uint32_t pbus::read(uint32_t addr)
 		nxbx_fatal("Unhandled read at address 0x%" PRIX32, addr);
 	}
 
-	if constexpr (is_be) {
-		value = util::byteswap(value);
-	}
-	if constexpr (should_log) {
+	if constexpr (log) {
 		log_io_read();
 	}
 
 	return value;
 }
 
-template<bool should_log, bool is_be>
+template<bool log>
 void pbus::pci_write(uint32_t addr, const uint32_t data)
 {
-	uint32_t value = data;
-	if constexpr (is_be) {
-		value = util::byteswap(value);
-	}
-	if constexpr (should_log) {
+	if constexpr (log) {
 		log_io_write();
 	}
 
 	uint32_t *pci_conf = (uint32_t *)m_pci_conf;
-	pci_conf[(addr - NV_PBUS_PCI_BASE) / 4] = value;
+	pci_conf[(addr - NV_PBUS_PCI_BASE) / 4] = data;
 }
 
-template<bool should_log, bool is_be>
+template<bool log>
 uint32_t pbus::pci_read(uint32_t addr)
 {
 	uint32_t *pci_conf = (uint32_t *)m_pci_conf;
 	uint32_t value = pci_conf[(addr - NV_PBUS_PCI_BASE) / 4];
 
-	if constexpr (is_be) {
-		value = util::byteswap(value);
-	}
-	if constexpr (should_log) {
+	if constexpr (log) {
 		log_io_read();
 	}
 
@@ -183,36 +169,36 @@ auto pbus::get_io_func(bool log, bool is_be)
 	if constexpr (is_pci) {
 		if constexpr (is_write) {
 			if (log) {
-				return is_be ? cpu_write<pbus, uint32_t, &pbus::pci_write<true, true>> : cpu_write<pbus, uint32_t, &pbus::pci_write<true>>;
+				return is_be ? nv2a_write<pbus, uint32_t, &pbus::pci_write<true>, true> : nv2a_write<pbus, uint32_t, &pbus::pci_write<true>>;
 			}
 			else {
-				return is_be ? cpu_write<pbus, uint32_t, &pbus::pci_write<false, true>> : cpu_write<pbus, uint32_t, &pbus::pci_write<false>>;
+				return is_be ? nv2a_write<pbus, uint32_t, &pbus::pci_write<false>, true> : nv2a_write<pbus, uint32_t, &pbus::pci_write<false>>;
 			}
 		}
 		else {
 			if (log) {
-				return is_be ? cpu_read<pbus, uint32_t, &pbus::pci_read<true, true>> : cpu_read<pbus, uint32_t, &pbus::pci_read<true>>;
+				return is_be ? nv2a_read<pbus, uint32_t, &pbus::pci_read<true>, true> : nv2a_read<pbus, uint32_t, &pbus::pci_read<true>>;
 			}
 			else {
-				return is_be ? cpu_read<pbus, uint32_t, &pbus::pci_read<false, true>> : cpu_read<pbus, uint32_t, &pbus::pci_read<false>>;
+				return is_be ? nv2a_read<pbus, uint32_t, &pbus::pci_read<false>, true> : nv2a_read<pbus, uint32_t, &pbus::pci_read<false>>;
 			}
 		}
 	}
 	else {
 		if constexpr (is_write) {
 			if (log) {
-				return is_be ? cpu_write<pbus, uint32_t, &pbus::write<true, true>> : cpu_write<pbus, uint32_t, &pbus::write<true>>;
+				return is_be ? nv2a_write<pbus, uint32_t, &pbus::write<true>, true> : nv2a_write<pbus, uint32_t, &pbus::write<true>>;
 			}
 			else {
-				return is_be ? cpu_write<pbus, uint32_t, &pbus::write<false, true>> : cpu_write<pbus, uint32_t, &pbus::write<false>>;
+				return is_be ? nv2a_write<pbus, uint32_t, &pbus::write<false>, true> : nv2a_write<pbus, uint32_t, &pbus::write<false>>;
 			}
 		}
 		else {
 			if (log) {
-				return is_be ? cpu_read<pbus, uint32_t, &pbus::read<true, true>> : cpu_read<pbus, uint32_t, &pbus::read<true>>;
+				return is_be ? nv2a_read<pbus, uint32_t, &pbus::read<true>, true> : nv2a_read<pbus, uint32_t, &pbus::read<true>>;
 			}
 			else {
-				return is_be ? cpu_read<pbus, uint32_t, &pbus::read<false, true>> : cpu_read<pbus, uint32_t, &pbus::read<false>>;
+				return is_be ? nv2a_read<pbus, uint32_t, &pbus::read<false>, true> : nv2a_read<pbus, uint32_t, &pbus::read<false>>;
 			}
 		}
 	}

src/hw/video/gpu/pbus.hpp

@@ -15,13 +15,13 @@ class pbus {
 	bool init();
 	void reset();
 	void update_io() { update_io(true); }
-	template<bool log = false, bool is_be = false>
+	template<bool log = false>
 	uint32_t read(uint32_t addr);
-	template<bool log = false, bool is_be = false>
+	template<bool log = false>
 	void write(uint32_t addr, const uint32_t data);
-	template<bool log = false, bool is_be = false>
+	template<bool log = false>
 	uint32_t pci_read(uint32_t addr);
-	template<bool log = false, bool is_be = false>
+	template<bool log = false>
 	void pci_write(uint32_t addr, const uint32_t data);
 
 private:

src/hw/video/gpu/pcrtc.cpp

@@ -17,46 +17,42 @@
 #define NV_PCRTC_UNKNOWN0 (NV2A_REGISTER_BASE + 0x00600804)
 
 
-template<bool log, bool enabled, bool is_be>
+template<bool log, bool enabled>
 void pcrtc::write(uint32_t addr, const uint32_t data)
 {
 	if constexpr (!enabled) {
 		return;
 	}
-	uint32_t value = data;
-	if constexpr (is_be) {
-		value = util::byteswap(value);
-	}
 	if constexpr (log) {
 		log_io_write();
 	}
 
 	switch (addr)
 	{
 	case NV_PCRTC_INTR_0:
-		int_status &= ~value;
+		int_status &= ~data;
 		m_machine->get<pmc>().update_irq();
 		break;
 
 	case NV_PCRTC_INTR_EN_0:
-		int_enabled = value;
+		int_enabled = data;
 		m_machine->get<pmc>().update_irq();
 		break;
 
 	case NV_PCRTC_START:
-		fb_addr = value & 0x7FFFFFC; // fb is 4 byte aligned
+		fb_addr = data & 0x7FFFFFC; // fb is 4 byte aligned
 		break;
 
 	case NV_PCRTC_UNKNOWN0:
-		unknown[0] = value;
+		unknown[0] = data;
 		break;
 
 	default:
-		nxbx_fatal("Unhandled write at address 0x%" PRIX32 " with value 0x%" PRIX32, addr, value);
+		nxbx_fatal("Unhandled write at address 0x%" PRIX32 " with value 0x%" PRIX32, addr, data);
 	}
 }
 
-template<bool log, bool enabled, bool is_be>
+template<bool log, bool enabled>
 uint32_t pcrtc::read(uint32_t addr)
 {
 	if constexpr (!enabled) {
@@ -87,9 +83,6 @@ uint32_t pcrtc::read(uint32_t addr)
 		nxbx_fatal("Unhandled read at address 0x%" PRIX32, addr);
 	}
 
-	if constexpr (is_be) {
-		value = util::byteswap(value);
-	}
 	if constexpr (log) {
 		log_io_read();
 	}
@@ -103,27 +96,27 @@ auto pcrtc::get_io_func(bool log, bool enabled, bool is_be)
 	if constexpr (is_write) {
 		if (enabled) {
 			if (log) {
-				return is_be ? cpu_write<pcrtc, uint32_t, &pcrtc::write<true, true, true>> : cpu_write<pcrtc, uint32_t, &pcrtc::write<true>>;
+				return is_be ? nv2a_write<pcrtc, uint32_t, &pcrtc::write<true, true>, true> : nv2a_write<pcrtc, uint32_t, &pcrtc::write<true>>;
 			}
 			else {
-				return is_be ? cpu_write<pcrtc, uint32_t, &pcrtc::write<false, true, true>> : cpu_write<pcrtc, uint32_t, &pcrtc::write<false>>;
+				return is_be ? nv2a_write<pcrtc, uint32_t, &pcrtc::write<false, true>, true> : nv2a_write<pcrtc, uint32_t, &pcrtc::write<false>>;
 			}
 		}
 		else {
-			return cpu_write<pcrtc, uint32_t, &pcrtc::write<false, false>>;
+			return nv2a_write<pcrtc, uint32_t, &pcrtc::write<false, false>>;
 		}
 	}
 	else {
 		if (enabled) {
 			if (log) {
-				return is_be ? cpu_read<pcrtc, uint32_t, &pcrtc::read<true, true, true>> : cpu_read<pcrtc, uint32_t, &pcrtc::read<true>>;
+				return is_be ? nv2a_read<pcrtc, uint32_t, &pcrtc::read<true, true>, true> : nv2a_read<pcrtc, uint32_t, &pcrtc::read<true>>;
 			}
 			else {
-				return is_be ? cpu_read<pcrtc, uint32_t, &pcrtc::read<false, true, true>> : cpu_read<pcrtc, uint32_t, &pcrtc::read<false>>;
+				return is_be ? nv2a_read<pcrtc, uint32_t, &pcrtc::read<false, true>, true> : nv2a_read<pcrtc, uint32_t, &pcrtc::read<false>>;
 			}
 		}
 		else {
-			return cpu_read<pcrtc, uint32_t, &pcrtc::read<false, false>>;
+			return nv2a_read<pcrtc, uint32_t, &pcrtc::read<false, false>>;
 		}
 	}
 }

src/hw/video/gpu/pcrtc.hpp

@@ -18,9 +18,9 @@ class pcrtc {
 	bool init();
 	void reset();
 	void update_io() { update_io(true); }
-	template<bool log = false, bool enabled = true, bool is_be = false>
+	template<bool log = false, bool enabled = true>
 	uint32_t read(uint32_t addr);
-	template<bool log = false, bool enabled = true, bool is_be = false>
+	template<bool log = false, bool enabled = true>
 	void write(uint32_t addr, const uint32_t data);
 
 private: