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test case
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mmrahorovic committed May 13, 2024
1 parent 34343e9 commit 4122ee7
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Showing 3 changed files with 12 additions and 11 deletions.
2 changes: 1 addition & 1 deletion finn-rtllib/mvu/mvu_4sx4u.sv
Original file line number Diff line number Diff line change
Expand Up @@ -452,7 +452,7 @@ module mvu_4sx4u #(
uwire [$clog2(SIMD)+7:0] lo4[3];
for(genvar i = 0; i < 4; i++) begin
localparam int unsigned LO_WIDTH = D[i+1] - D[i];
localparam int unsigned HI_WIDTH = (ACCU_WIDTH - LO_WIDTH) < ($clog2(1+SIMD) + 1) ? $clog2(1+SIMD) : (ACCU_WIDTH - LO_WIDTH);
localparam int unsigned HI_WIDTH = ACCU_WIDTH - LO_WIDTH;

// Conclusive high part accumulation
if(i >= PE_REM && i < 3) begin : genHi
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4 changes: 2 additions & 2 deletions finn-rtllib/mvu/mvu_8sx8u_dsp48.sv
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Expand Up @@ -453,7 +453,7 @@ module mvu_8sx8u_dsp48 #(

// Conclusive high part accumulation
if(PE_REM == 0) begin : genHi
localparam int unsigned HI_WIDTH = (ACCU_WIDTH - SINGLE_PROD_WIDTH) < ($clog2(1+SIMD)+1) ? $clog2(1+SIMD)+1 : ACCU_WIDTH - SINGLE_PROD_WIDTH;
localparam int unsigned HI_WIDTH = ACCU_WIDTH - SINGLE_PROD_WIDTH;
// Adder Tree across all SIMD high contributions, each from [-1:1]
uwire signed [2*SIMD-2:0][$clog2(1+SIMD):0] tree;
for(genvar s = 0; s < SIMD; s++) assign tree[SIMD-1+s] = h3[s];
Expand Down Expand Up @@ -510,7 +510,7 @@ module mvu_8sx8u_dsp48 #(
always_ff @(posedge clk) begin
if(rst) Res5 <= '{ default: 0 };
else if(en) begin
Res5[1] <= up4 - hi4;
Res5[1] <= up4 - hi4; // -809 - 1 (_01) = -810. -809 - -3 (101) = -806
Res5[0] <= $signed({ hi4, {(D[1] - D[0]){1'b0}} }) + $signed({ 1'b0, lo4 });
end
end
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17 changes: 9 additions & 8 deletions finn-rtllib/mvu/tb/mvu_axi_tb.sv
Original file line number Diff line number Diff line change
Expand Up @@ -36,19 +36,19 @@ module mvu_axi_tb();
//-------------------- Simulation parameters --------------------\\
// Matrix & parallelism config
localparam bit IS_MVU = 1;
localparam string COMPUTE_CORE = "mvu_4sx4u";
localparam int unsigned MW = 120;
localparam int unsigned MH = 40;
localparam int unsigned SIMD = 20;
localparam int unsigned PE = 10;
localparam string COMPUTE_CORE = "mvu_8sx8u_dsp48";
localparam int unsigned MW = 6;
localparam int unsigned MH = 32;
localparam int unsigned SIMD = 6;
localparam int unsigned PE = 16;
localparam int unsigned SEGMENTLEN = 2.0;
localparam bit FORCE_BEHAVIORAL = 1;
localparam bit M_REG_LUT = 1;
// Bit-width config
localparam int unsigned ACTIVATION_WIDTH = 4;
localparam int unsigned ACTIVATION_WIDTH = 8;
localparam int unsigned WEIGHT_WIDTH = 4;
localparam int unsigned ACCU_WIDTH = ACTIVATION_WIDTH+WEIGHT_WIDTH+$clog2(MW);
localparam bit SIGNED_ACTIVATIONS = 0;
localparam int unsigned ACCU_WIDTH = 14; //ACTIVATION_WIDTH+WEIGHT_WIDTH+$clog2(MW);
localparam bit SIGNED_ACTIVATIONS = 1;
// Simulation constants
localparam int unsigned NF = MH/PE;
localparam int unsigned SF = MW/SIMD;
Expand Down Expand Up @@ -132,6 +132,7 @@ module mvu_axi_tb();
for (int i=0; i<NF; i++) begin
for (int j=0; j<SF; j++) begin
weights.dat <= WEIGHTS[i][j];
//$fread("memblock.dat", weights.dat);
@(posedge clk iff weights.rdy);
end
end
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