change power ports direction to inout

efabless · Jul 8, 2024 · 2304156 · 2304156
1 parent 18c5668
commit 2304156
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Showing 3 changed files with 5 additions and 5 deletions.
diff --git a/EF_UART.yaml b/EF_UART.yaml
@@ -7,7 +7,7 @@ info:
  license: APACHE 2.0
  author: Mohamed Shalan
  email: [email protected]
- version: v1.1.4
+ version: v1.1.5
  date: 08-07-2024
  category: digital
  tags:

diff --git a/hdl/rtl/bus_wrappers/EF_UART_APB.pp.v b/hdl/rtl/bus_wrappers/EF_UART_APB.pp.v
@@ -30,8 +30,8 @@ module EF_UART_APB #(
  FAW = 4
 ) (
 `ifdef USE_POWER_PINS
- input wire VPWR,
- input wire VGND,
+ inout VPWR,
+ inout VGND,
 `endif
  input wire PCLK,
  input wire PRESETn,

diff --git a/hdl/rtl/bus_wrappers/EF_UART_APB.v b/hdl/rtl/bus_wrappers/EF_UART_APB.v
@@ -34,8 +34,8 @@ module EF_UART_APB #(
  FAW = 4
 ) (
 `ifdef USE_POWER_PINS
- input wire VPWR,
- input wire VGND,
+ inout VPWR,
+ inout VGND,
 `endif
  `APB_SLAVE_PORTS,
  input wire [1-1:0] rx,