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Add WriteReadRegsTest Run UVM tests #14: Commit f52aab9 pushed by M0stafaRady
October 2, 2024 18:33 5m 58s main
main
October 2, 2024 18:33 5m 58s
Merge pull request #8 from efabless/uvm Run UVM tests #13: Commit 30e657e pushed by M0stafaRady
October 2, 2024 12:39 5m 30s main
main
October 2, 2024 12:39 5m 30s
Uvm Run UVM tests #12: Pull request #8 synchronize by M0stafaRady
October 2, 2024 12:32 6m 35s uvm
uvm
October 2, 2024 12:32 6m 35s
add write_read test to the testlib Run UVM tests #11: Commit 5bed899 pushed by M0stafaRady
October 2, 2024 12:32 5m 58s uvm
uvm
October 2, 2024 12:32 5m 58s
Uvm Run UVM tests #10: Pull request #8 synchronize by M0stafaRady
October 2, 2024 12:27 5m 23s uvm
uvm
October 2, 2024 12:27 5m 23s
Add new i2c test Run UVM tests #9: Commit 9174134 pushed by M0stafaRady
October 2, 2024 12:27 4m 29s uvm
uvm
October 2, 2024 12:27 4m 29s
Uvm Run UVM tests #8: Pull request #8 synchronize by M0stafaRady
October 2, 2024 11:30 6m 23s uvm
uvm
October 2, 2024 11:30 6m 23s
Add design name for syns Run UVM tests #7: Commit 160dbc6 pushed by M0stafaRady
October 2, 2024 11:30 3m 50s uvm
uvm
October 2, 2024 11:30 3m 50s
Uvm Run UVM tests #6: Pull request #8 synchronize by M0stafaRady
October 2, 2024 10:53 6m 18s uvm
uvm
October 2, 2024 10:53 6m 18s
remove * from make file since openlane can't process it Run UVM tests #5: Commit b4fecc9 pushed by M0stafaRady
October 2, 2024 10:53 4m 0s uvm
uvm
October 2, 2024 10:53 4m 0s
Uvm Run UVM tests #4: Pull request #8 synchronize by M0stafaRady
October 2, 2024 10:22 4m 5s uvm
uvm
October 2, 2024 10:22 4m 5s
Add paramters for GL synth Run UVM tests #3: Commit e3f5a12 pushed by M0stafaRady
October 2, 2024 10:22 5m 35s uvm
uvm
October 2, 2024 10:22 5m 35s
Uvm Run UVM tests #2: Pull request #8 synchronize by M0stafaRady
October 2, 2024 10:02 4m 5s uvm
uvm
October 2, 2024 10:02 4m 5s
Add CI and update yaml with wishbone Run UVM tests #1: Commit 527f280 pushed by M0stafaRady
October 2, 2024 10:02 3m 52s uvm
uvm
October 2, 2024 10:02 3m 52s