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Fixed incorrect constant truncation
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dstogov committed Aug 30, 2023
1 parent c09877b commit 474a8a8
Showing 1 changed file with 18 additions and 3 deletions.
21 changes: 18 additions & 3 deletions ir_aarch64.dasc
Original file line number Diff line number Diff line change
Expand Up @@ -1440,13 +1440,28 @@ static void ir_emit_binop_int(ir_ctx *ctx, ir_ref def, ir_insn *insn)
| ASM_REG_REG_IMM_OP subs, type, def_reg, op1_reg, val
break;
case IR_OR:
| ASM_REG_REG_IMM_OP orr, type, def_reg, op1_reg, val
if (ir_type_size[type] == 8) {
uint64_t val = ctx->ir_base[op2].val.u64;
| ASM_REG_REG_IMM_OP orr, type, def_reg, op1_reg, val
} else {
| ASM_REG_REG_IMM_OP orr, type, def_reg, op1_reg, val
}
break;
case IR_AND:
| ASM_REG_REG_IMM_OP and, type, def_reg, op1_reg, val
if (ir_type_size[type] == 8) {
uint64_t val = ctx->ir_base[op2].val.u64;
| ASM_REG_REG_IMM_OP and, type, def_reg, op1_reg, val
} else {
| ASM_REG_REG_IMM_OP and, type, def_reg, op1_reg, val
}
break;
case IR_XOR:
| ASM_REG_REG_IMM_OP eor, type, def_reg, op1_reg, val
if (ir_type_size[type] == 8) {
uint64_t val = ctx->ir_base[op2].val.u64;
| ASM_REG_REG_IMM_OP eor, type, def_reg, op1_reg, val
} else {
| ASM_REG_REG_IMM_OP eor, type, def_reg, op1_reg, val
}
break;
}
}
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