[MERGE] Update ChibiOS to latest stable (24651)

drashna · Nov 29, 2024 · 7183e26 · 7183e26
1 parent f7426ef
commit 7183e26
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Showing 5 changed files with 50 additions and 2 deletions.
diff --git a/lib/chibios b/lib/chibios
diff --git a/lib/chibios-contrib b/lib/chibios-contrib
diff --git a/platforms/chibios/boards/GENERIC_STM32_H723XG/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_H723XG/configs/mcuconf.h
@@ -182,6 +182,7 @@
 
 #define STM32_IRQ_FDCAN1_PRIORITY           10
 #define STM32_IRQ_FDCAN2_PRIORITY           10
+#define STM32_IRQ_FDCAN3_PRIORITY           10
 
 #define STM32_IRQ_MDMA_PRIORITY             9
 
@@ -235,6 +236,7 @@
  */
 #define STM32_CAN_USE_FDCAN1                FALSE
 #define STM32_CAN_USE_FDCAN2                FALSE
+#define STM32_CAN_USE_FDCAN3                FALSE
 
 /*
  * DAC driver system settings.

diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h
@@ -49,6 +49,19 @@
 #define CH_CFG_SMP_MODE                     FALSE
 #endif
 
+/**
+ * @brief   Kernel hardening level.
+ * @details This option is the level of functional-safety checks enabled
+ *          in the kerkel. The meaning is:
+ *          - 0: No checks, maximum performance.
+ *          - 1: Reasonable checks.
+ *          - 2: All checks.
+ *          .
+ */
+#if !defined(CH_CFG_HARDENING_LEVEL)
+#define CH_CFG_HARDENING_LEVEL              0
+#endif
+
 /** @} */
 
 /*===========================================================================*/
@@ -360,6 +373,16 @@
 #define CH_CFG_USE_MAILBOXES                TRUE
 #endif
 
+/**
+ * @brief   Memory checks APIs.
+ * @details If enabled then the memory checks APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_MEMCHECKS)
+#define CH_CFG_USE_MEMCHECKS                TRUE
+#endif
+
 /**
  * @brief   Core Memory Manager APIs.
  * @details If enabled then the core memory manager APIs are included

diff --git a/platforms/chibios/boards/common/configs/chconf.h b/platforms/chibios/boards/common/configs/chconf.h
@@ -49,6 +49,19 @@
 #define CH_CFG_SMP_MODE                     FALSE
 #endif
 
+/**
+ * @brief   Kernel hardening level.
+ * @details This option is the level of functional-safety checks enabled
+ *          in the kerkel. The meaning is:
+ *          - 0: No checks, maximum performance.
+ *          - 1: Reasonable checks.
+ *          - 2: All checks.
+ *          .
+ */
+#if !defined(CH_CFG_HARDENING_LEVEL)
+#define CH_CFG_HARDENING_LEVEL              0
+#endif
+
 /** @} */
 
 /*===========================================================================*/
@@ -360,6 +373,16 @@
 #define CH_CFG_USE_MAILBOXES                FALSE
 #endif
 
+/**
+ * @brief   Memory checks APIs.
+ * @details If enabled then the memory checks APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_MEMCHECKS)
+#define CH_CFG_USE_MEMCHECKS                TRUE
+#endif
+
 /**
  * @brief   Core Memory Manager APIs.
  * @details If enabled then the core memory manager APIs are included
+2 −0		demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg/stm32h735ig_discovery/mcuconf.h
+2 −0		demos/STM32/RT-STM32H723ZG-NUCLEO144/cfg/mcuconf.h
+2 −0		demos/STM32/RT-STM32H735IG-DISCOVERY/cfg/mcuconf.h
+1 −1		demos/STM32/RT-STM32H750XB-DISCOVERY/cfg/halconf.h
+41 −15		demos/STM32/RT-STM32H750XB-DISCOVERY/cfg/mcuconf.h
+5 −5		demos/STM32/RT-STM32H750XB-DISCOVERY/main.c
+19 −2		os/common/ports/ARMv6-M-RP2/chcore.h
+19 −2		os/common/ports/ARMv6-M/chcore.h
+19 −2		os/common/ports/ARMv7-M-ALT/chcore.h
+19 −2		os/common/ports/ARMv7-M/chcore.h
+19 −2		os/common/ports/ARMv8-M-ML-TZ/chcore.h
+19 −2		os/common/ports/ARMv8-M-ML/chcore.h
+17 −26		os/common/ports/templates/chcore.h
+1 −1		os/hal/boards/ST_STM32H750XB_DISCOVERY/board.c
+20 −19		os/hal/boards/ST_STM32H750XB_DISCOVERY/board.h
+7 −7		os/hal/boards/ST_STM32H750XB_DISCOVERY/cfg/board.chcfg
+2 −2		os/hal/include/hal.h
+198 −141		os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c
+172 −40		os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h
+217 −0		os/hal/ports/STM32/LLD/FDCANv1/stm32_fdcan.h
+9 −0		os/hal/ports/STM32/LLD/FDCANv2/driver.mk
+876 −0		os/hal/ports/STM32/LLD/FDCANv2/hal_can_lld.c
+615 −0		os/hal/ports/STM32/LLD/FDCANv2/hal_can_lld.h
+290 −0		os/hal/ports/STM32/LLD/FDCANv2/stm32_fdcan.h
+106 −0		os/hal/ports/STM32/LLD/FDCANv2/stm32_fdcan1.inc
+106 −0		os/hal/ports/STM32/LLD/FDCANv2/stm32_fdcan2.inc
+106 −0		os/hal/ports/STM32/LLD/FDCANv2/stm32_fdcan3.inc
+15 −2		os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c
+2 −2		os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
+4 −4		os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
+2 −2		os/hal/ports/STM32/STM32F7xx/stm32_registry.h
+0 −24		os/hal/ports/STM32/STM32G4xx/stm32_registry.h
+1 −1		os/hal/ports/STM32/STM32H7xx/platform.mk
+1 −1		os/hal/ports/STM32/STM32H7xx/platform_type2.mk
+3 −0		os/hal/ports/STM32/STM32H7xx/stm32_isr.c
+4 −0		os/hal/ports/STM32/STM32H7xx/stm32_isr.h
+2 −25		os/hal/ports/STM32/STM32H7xx/stm32_registry.h
+3 −2		os/hal/src/hal_rtc.c
+1 −1		os/hal/src/hal_sdc.c
+9 −2		os/nil/include/ch.h
+12 −6		os/nil/src/ch.c
+855 −829		os/oslib/src/chfactory.c
+2 −2		os/rt/include/ch.h
+7 −0		os/rt/include/chport.h
+8 −2		os/rt/include/chsys.h
+9 −3		os/rt/src/chsys.c
+16 −20		os/rt/src/chthreads.c
+28 −9		os/various/lwip_bindings/arch/sys_arch.c
+7 −0		readme.txt
+1 −1		test/rt/configuration.xml
+10 −0		test/rt/source/test/rt_test_sequence_002.c
+56 −0		testhal/STM32/STM32G4xx/CAN/.cproject
+38 −0		testhal/STM32/STM32G4xx/CAN/.project
+186 −0		testhal/STM32/STM32G4xx/CAN/Makefile
+817 −0		testhal/STM32/STM32G4xx/CAN/cfg/chconf.h
+553 −0		testhal/STM32/STM32G4xx/CAN/cfg/halconf.h
+406 −0		testhal/STM32/STM32G4xx/CAN/cfg/mcuconf.h
+163 −0		testhal/STM32/STM32G4xx/CAN/main.c
+37 −0		testhal/STM32/STM32G4xx/CAN/readme.txt
+55 −0		testhal/STM32/STM32H7xx/CAN/.cproject
+91 −0		testhal/STM32/STM32H7xx/CAN/.project
+188 −0		testhal/STM32/STM32H7xx/CAN/Makefile
+840 −0		testhal/STM32/STM32H7xx/CAN/cfg/chconf.h
+553 −0		testhal/STM32/STM32H7xx/CAN/cfg/halconf.h
+527 −0		testhal/STM32/STM32H7xx/CAN/cfg/mcuconf.h
+145 −0		testhal/STM32/STM32H7xx/CAN/main.c
+2 −0		testhal/STM32/multi/USB_CDC/cfg/stm32h723zg_nucleo144/mcuconf.h
+2 −0		testhal/STM32/multi/WSPI-MFS/cfg/stm32h735ig_discovery/mcuconf.h
+2 −0		tools/ftl/processors/conf/mcuconf_stm32h723xx/mcuconf.h.ftl