Add pcie acs and no-bus-reset quirk for mucse Nics

[asfdd3]

1.Some MUCSE N10/N400 chips do not support bus/hot reset. The PCIE automatically disables LTSSM when Secondary Bus Reset is received and the device stops working. Prevent bus reset for these devices.

2.Some MUCSE N10/N400 chips may be multi-function devices, but the hardware does not advertise ACS capability. Add an ACS quirk for these chips NICS so the functions can be in independent IOMMU groups.

[deepin-ci-robot]

Hi @asfdd3. Thanks for your PR.

I'm waiting for a deepin-community member to verify that this patch is reasonable to test. If it is, they should reply with /ok-to-test on its own line. Until that is done, I will not automatically test new commits in this PR, but the usual testing commands by org members will still work. Regular contributors should join the org to skip this step.

Once the patch is verified, the new status will be reflected by the ok-to-test label.

I understand the commands that are listed here.

Instructions for interacting with me using PR comments are available here. If you have questions or suggestions related to my behavior, please file an issue against the kubernetes/test-infra repository.

[deepin-ci-robot]

[APPROVALNOTIFIER] This PR is NOT APPROVED

This pull-request has been approved by:
Once this PR has been reviewed and has the lgtm label, please assign avenger-285714 for approval. For more information see the Code Review Process.

The full list of commands accepted by this bot can be found here.

Needs approval from an approver in each of these files:

• deepin/OWNERS

Approvers can indicate their approval by writing /approve in a comment
Approvers can cancel approval by writing /approve cancel in a comment