Rename Utils.bsv to slove name conflict

datenlord · Jan 12, 2024 · a03b2ad · a03b2ad
1 parent a4c5a24
commit a03b2ad
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Showing 26 changed files with 25 additions and 25 deletions.
diff --git a/README.md b/README.md
@@ -37,7 +37,7 @@ Here is a list of some critical source files:
 │   ├── Ports.bsv              # numeric and struct types about in/output ports of modules
 │   ├── RFile.bsv
 │   ├── StreamHandler.bsv      # modules implemented for manipulating data stream
-│   └── Utils.bsv              # utility functions and modules
+│   └── EthUtils.bsv           # utility functions and modules
 ├── MacLayer.bsv               # generator and parser for Ethernet packet
 ├── PfcUdpIpArpEthRxTx.bsv     # generator and parser for UDP/IP/Ethernet packet with PFC
 ├── PriorityFlowControl.bsv    # modules handling PFC

diff --git a/fpga/bsv/TestXdmaUdpIpArpEthCmacRxTx.bsv b/fpga/bsv/TestXdmaUdpIpArpEthCmacRxTx.bsv
@@ -5,7 +5,7 @@ import Vector :: *;
 import Randomizable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 
 import SemiFifo :: *;
 import AxiStreamTypes :: *;

diff --git a/fpga/bsv/TestXilinxAxiStreamAsyncFifo.bsv b/fpga/bsv/TestXilinxAxiStreamAsyncFifo.bsv
@@ -3,7 +3,7 @@ import Clocks :: *;
 import Connectable :: *;
 import Randomizable :: *;
 
-import Utils :: *;
+import EthUtils :: *;
 import XilinxAxiStreamAsyncFifo :: *;
 
 import AxiStreamTypes :: *;

diff --git a/fpga/bsv/XdmaUdpCmacPerfMonitor.bsv b/fpga/bsv/XdmaUdpCmacPerfMonitor.bsv
@@ -1,7 +1,7 @@
 import FIFOF :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 
 import SemiFifo :: *;
 import AxiStreamTypes :: *;

diff --git a/fpga/bsv/XdmaUdpIpArpEthCmacRxTx.bsv b/fpga/bsv/XdmaUdpIpArpEthCmacRxTx.bsv
@@ -5,7 +5,7 @@ import BRAMFIFO :: *;
 import Connectable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import BusConversion :: *;
 import StreamHandler :: *;
 import EthernetTypes :: *;

diff --git a/src/ArpCache.bsv b/src/ArpCache.bsv
@@ -4,7 +4,7 @@ import Vector :: *;
 import ClientServer :: *;
 
 import RFile :: *;
-import Utils :: *;
+import EthUtils :: *;
 import CompletionBuf :: *;
 import EthernetTypes :: *;
 import ContentAddressMem :: *;

diff --git a/src/ArpProcessor.bsv b/src/ArpProcessor.bsv
@@ -3,7 +3,7 @@ import GetPut :: *;
 import ClientServer :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import ArpCache :: *;
 import StreamHandler :: *;
 import EthernetTypes :: *;

diff --git a/src/PriorityFlowControl.bsv b/src/PriorityFlowControl.bsv
@@ -6,7 +6,7 @@ import Arbiter :: *;
 import BRAMFIFO :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import SemiFifo :: *;
 import EthernetTypes :: *;
 

diff --git a/src/UdpIpArpEthCmacRxTx.bsv b/src/UdpIpArpEthCmacRxTx.bsv
@@ -4,7 +4,7 @@ import BRAMFIFO :: *;
 import Connectable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import StreamHandler :: *;
 import UdpIpArpEthRxTx :: *;
 import PortConversion :: *;

diff --git a/src/UdpIpArpEthRxTx.bsv b/src/UdpIpArpEthRxTx.bsv
@@ -4,7 +4,7 @@ import BRAMFIFO :: *;
 import Connectable :: *;
 
 // import Utils :: *;
-import Utils :: *;
+import EthUtils :: *;
 import Ports :: *;
 import ArpCache :: *;
 import MacLayer :: *;

diff --git a/src/UdpIpEthRx.bsv b/src/UdpIpEthRx.bsv
@@ -3,7 +3,7 @@ import GetPut :: *;
 import Connectable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import MacLayer :: *;
 import UdpIpLayer :: *;
 import StreamHandler :: *;

diff --git a/src/UdpIpEthTx.bsv b/src/UdpIpEthTx.bsv
@@ -2,7 +2,7 @@ import GetPut :: *;
 import FIFOF :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import MacLayer :: *;
 import UdpIpLayer :: *;
 import EthernetTypes :: *;

diff --git a/src/UdpIpLayerForRdma.bsv b/src/UdpIpLayerForRdma.bsv
@@ -1,7 +1,7 @@
 import FIFOF :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import UdpIpLayer :: *;
 import EthernetTypes :: *;
 import StreamHandler :: *;

diff --git a/src/XilinxCmacController.bsv b/src/XilinxCmacController.bsv
@@ -5,7 +5,7 @@ import BRAMFIFO :: *;
 import Connectable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import EthernetTypes :: *;
 import StreamHandler :: *;
 

diff --git a/src/includes/Utils.bsv → src/includes/EthUtils.bsv b/src/includes/Utils.bsv → src/includes/EthUtils.bsv
diff --git a/src/includes/StreamHandler.bsv b/src/includes/StreamHandler.bsv
@@ -1,6 +1,6 @@
 import FIFOF :: *;
 
-import Utils :: *;
+import EthUtils :: *;
 import Ports :: *;
 
 import SemiFifo :: *;

diff --git a/test/bluesim/TestAppendDataStreamTail.bsv b/test/bluesim/TestAppendDataStreamTail.bsv
@@ -2,7 +2,7 @@ import FIFOF :: *;
 import Randomizable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import SemiFifo :: *;
 import StreamHandler :: *;
 import TestUtils :: *;

diff --git a/test/bluesim/TestArpCache.bsv b/test/bluesim/TestArpCache.bsv
@@ -4,7 +4,7 @@ import Connectable :: *;
 import Vector :: *;
 import ClientServer :: *;
 import GetPut :: *;
-import Utils :: *;
+import EthUtils :: *;
 
 import SemiFifo :: *;
 import ArpCache :: *;

diff --git a/test/bluesim/TestCompletionBuf.bsv b/test/bluesim/TestCompletionBuf.bsv
@@ -1,4 +1,4 @@
-import Utils :: *;
+import EthUtils :: *;
 import FIFOF :: *;
 import CompletionBuf :: *;
 import Randomizable :: *;

diff --git a/test/bluesim/TestPfcUdpIpArpEthRxTx.bsv b/test/bluesim/TestPfcUdpIpArpEthRxTx.bsv
@@ -5,7 +5,7 @@ import Connectable :: *;
 import Randomizable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import EthernetTypes :: *;
 import PfcUdpIpArpEthRxTx :: *;
 

diff --git a/test/bluesim/TestPriorityFlowControl.bsv b/test/bluesim/TestPriorityFlowControl.bsv
@@ -7,7 +7,7 @@ import Randomizable :: *;
 
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import SemiFifo :: *;
 import TestUtils :: *;
 import EthernetTypes :: *;

diff --git a/test/bluesim/TestRemoveICrcFromDataStream.bsv b/test/bluesim/TestRemoveICrcFromDataStream.bsv
@@ -2,7 +2,7 @@ import FIFOF :: *;
 import Randomizable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import SemiFifo :: *;
 import TestUtils :: *;
 import EthernetTypes :: *;

diff --git a/test/bluesim/TestUtils.bsv b/test/bluesim/TestUtils.bsv
@@ -5,7 +5,7 @@ import ClientServer :: *;
 import Randomizable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import SemiFifo :: *;
 
 typedef Server#(

diff --git a/test/cocotb/Makefile b/test/cocotb/Makefile
@@ -7,7 +7,7 @@ LIB_WRAPPER_DIR = $(ROOT_DIR)/lib/blue-wrapper/src
 LIBSRCDIR = $(LIB_CRC_DIR):$(LIB_WRAPPER_DIR)
 CRC_TAB_SCRIPT = $(ROOT_DIR)/lib/blue-crc/scripts/gen_crc_tab.py
 
-TARGET = UdpIpArpEthRxTx
+TARGET = UdpIpEthRx
 FILE_PATH = $(ROOT_DIR)/src
 TEST_FILE = Test$(TARGET).py
 DESIGN_FILE ?= $(TARGET).bsv

diff --git a/test/vivado/bsv/TestPfcUdpIpArpEthCmacRxTx.bsv b/test/vivado/bsv/TestPfcUdpIpArpEthCmacRxTx.bsv
@@ -6,7 +6,7 @@ import Connectable :: *;
 import Randomizable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import EthernetTypes :: *;
 
 import SemiFifo :: *;

diff --git a/test/vivado/bsv/TestUdpIpArpEthCmacRxTx.bsv b/test/vivado/bsv/TestUdpIpArpEthCmacRxTx.bsv
@@ -5,7 +5,7 @@ import Clocks :: *;
 import Randomizable :: *;
 
 import Ports :: *;
-import Utils :: *;
+import EthUtils :: *;
 import PortConversion :: *;
 
 import SemiFifo :: *;