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Merge upstream-jdk
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corretto-github-robot committed Oct 19, 2024
2 parents 873965b + 309b929 commit 7967a07
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Showing 27 changed files with 791 additions and 331 deletions.
8 changes: 3 additions & 5 deletions make/autoconf/flags-cflags.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -936,15 +936,13 @@ AC_DEFUN_ONCE([FLAGS_SETUP_BRANCH_PROTECTION],
if test "x$OPENJDK_TARGET_CPU" = xaarch64; then
if test "x$TOOLCHAIN_TYPE" = xgcc || test "x$TOOLCHAIN_TYPE" = xclang; then
FLAGS_COMPILER_CHECK_ARGUMENTS(ARGUMENT: [${BRANCH_PROTECTION_FLAG}],
FLAGS_COMPILER_CHECK_ARGUMENTS(ARGUMENT: [$BRANCH_PROTECTION_FLAG],
IF_TRUE: [BRANCH_PROTECTION_AVAILABLE=true])
fi
fi
BRANCH_PROTECTION_CFLAGS=""
UTIL_ARG_ENABLE(NAME: branch-protection, DEFAULT: false,
RESULT: USE_BRANCH_PROTECTION, AVAILABLE: $BRANCH_PROTECTION_AVAILABLE,
RESULT: BRANCH_PROTECTION_ENABLED, AVAILABLE: $BRANCH_PROTECTION_AVAILABLE,
DESC: [enable branch protection when compiling C/C++],
IF_ENABLED: [ BRANCH_PROTECTION_CFLAGS=${BRANCH_PROTECTION_FLAG}])
AC_SUBST(BRANCH_PROTECTION_CFLAGS)
IF_ENABLED: [BRANCH_PROTECTION_CFLAGS=$BRANCH_PROTECTION_FLAG])
])
4 changes: 4 additions & 0 deletions make/autoconf/flags-other.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -150,5 +150,9 @@ AC_DEFUN([FLAGS_SETUP_ASFLAGS_CPU_DEP],
$2JVM_ASFLAGS="${$2JVM_ASFLAGS} $ARM_ARCH_TYPE_ASFLAGS $ARM_FLOAT_TYPE_ASFLAGS"
fi
if test "x$BRANCH_PROTECTION_ENABLED" = "xtrue"; then
$2JVM_ASFLAGS="${$2JVM_ASFLAGS} $BRANCH_PROTECTION_FLAG"
fi
AC_SUBST($2JVM_ASFLAGS)
])
1 change: 0 additions & 1 deletion make/autoconf/spec.gmk.template
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Original file line number Diff line number Diff line change
Expand Up @@ -429,7 +429,6 @@ ENABLE_LIBFFI_BUNDLING := @ENABLE_LIBFFI_BUNDLING@
LIBFFI_LIB_FILE := @LIBFFI_LIB_FILE@
FILE_MACRO_CFLAGS := @FILE_MACRO_CFLAGS@
REPRODUCIBLE_CFLAGS := @REPRODUCIBLE_CFLAGS@
BRANCH_PROTECTION_CFLAGS := @BRANCH_PROTECTION_CFLAGS@

STATIC_LIBS_CFLAGS := @STATIC_LIBS_CFLAGS@

Expand Down
6 changes: 3 additions & 3 deletions src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -275,14 +275,14 @@ void LIR_Assembler::osr_entry() {
// verify the interpreter's monitor has a non-null object
{
Label L;
__ ldr(rscratch1, Address(OSR_buf, slot_offset + 1*BytesPerWord));
__ ldr(rscratch1, __ form_address(rscratch1, OSR_buf, slot_offset + 1*BytesPerWord, 0));
__ cbnz(rscratch1, L);
__ stop("locked object is null");
__ bind(L);
}
#endif
__ ldr(r19, Address(OSR_buf, slot_offset));
__ ldr(r20, Address(OSR_buf, slot_offset + BytesPerWord));
__ ldr(r19, __ form_address(rscratch1, OSR_buf, slot_offset, 0));
__ ldr(r20, __ form_address(rscratch1, OSR_buf, slot_offset + BytesPerWord, 0));
__ str(r19, frame_map()->address_for_monitor_lock(i));
__ str(r20, frame_map()->address_for_monitor_object(i));
}
Expand Down
11 changes: 10 additions & 1 deletion src/hotspot/cpu/aarch64/copy_aarch64.hpp
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
Expand Down Expand Up @@ -64,28 +64,34 @@ static void pd_zero_to_bytes(void* to, size_t count) {
" br %[t0];\n" \
" .align 5;\n" \
"0:" \
" hint #0x24; // bti j\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldr %[t0], [%[s], #0];\n" \
" str %[t0], [%[d], #0];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" stp %[t0], %[t1], [%[d], #0];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldr %[t2], [%[s], #16];\n" \
" stp %[t0], %[t1], [%[d], #0];\n" \
" str %[t2], [%[d], #16];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" stp %[t0], %[t1], [%[d], #0];\n" \
" stp %[t2], %[t3], [%[d], #16];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" ldr %[t4], [%[s], #32];\n" \
Expand All @@ -94,6 +100,7 @@ static void pd_zero_to_bytes(void* to, size_t count) {
" str %[t4], [%[d], #32];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" ldp %[t4], %[t5], [%[s], #32];\n" \
Expand All @@ -103,13 +110,15 @@ static void pd_zero_to_bytes(void* to, size_t count) {
" stp %[t4], %[t5], [%[d], #32];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldr %[t6], [%[s], #0];\n" \
" ldp %[t0], %[t1], [%[s], #8];\n" \
" ldp %[t2], %[t3], [%[s], #24];\n" \
" ldp %[t4], %[t5], [%[s], #40];\n" \
" str %[t6], [%[d]], #8;\n" \
" b 2b;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" ldp %[t4], %[t5], [%[s], #32];\n" \
Expand Down
6 changes: 5 additions & 1 deletion src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -216,7 +216,11 @@ int LIR_Assembler::emit_unwind_handler() {
LIR_Opr lock = FrameMap::as_opr(Z_R1_scratch);
monitor_address(0, lock);
stub = new MonitorExitStub(lock, true, 0);
__ unlock_object(Rtmp1, Rtmp2, lock->as_register(), *stub->entry());
if (LockingMode == LM_MONITOR) {
__ branch_optimized(Assembler::bcondAlways, *stub->entry());
} else {
__ unlock_object(Rtmp1, Rtmp2, lock->as_register(), *stub->entry());
}
__ bind(*stub->continuation());
}

Expand Down
4 changes: 4 additions & 0 deletions src/hotspot/cpu/s390/c1_MacroAssembler_s390.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -120,6 +120,8 @@ void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox
branch_optimized(Assembler::bcondNotZero, slow_case);
// done
bind(done);
} else {
assert(false, "Unhandled LockingMode:%d", LockingMode);
}
}

Expand Down Expand Up @@ -151,6 +153,8 @@ void C1_MacroAssembler::unlock_object(Register Rmark, Register Roop, Register Rb
// If the object header was not pointing to the displaced header,
// we do unlocking via runtime call.
branch_optimized(Assembler::bcondNotEqual, slow_case);
} else {
assert(false, "Unhandled LockingMode:%d", LockingMode);
}
// done
bind(done);
Expand Down
52 changes: 50 additions & 2 deletions src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S
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Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@

.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_8_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldaddal x1, x2, [x0]
#else
Expand All @@ -41,6 +42,7 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_8_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_4_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldaddal w1, w2, [x0]
#else
Expand All @@ -56,8 +58,9 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_4_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_8_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldadd x1, x2, [x0]
ldadd x1, x2, [x0]
#else
prfm pstl1strm, [x0]
0: ldxr x2, [x0]
Expand All @@ -70,8 +73,9 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_8_relaxed_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_4_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldadd w1, w2, [x0]
ldadd w1, w2, [x0]
#else
prfm pstl1strm, [x0]
0: ldxr w2, [x0]
Expand All @@ -84,6 +88,7 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_4_relaxed_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_xchg_4_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
swpal w1, w2, [x0]
#else
Expand All @@ -98,6 +103,7 @@ DECLARE_FUNC(aarch64_atomic_xchg_4_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_xchg_8_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
swpal x1, x2, [x0]
#else
Expand All @@ -112,6 +118,7 @@ DECLARE_FUNC(aarch64_atomic_xchg_8_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_1_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casalb w3, w2, [x0]
Expand All @@ -131,6 +138,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_1_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal w3, w2, [x0]
Expand All @@ -149,6 +157,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal x3, x2, [x0]
Expand All @@ -167,6 +176,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_release_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casl w3, w2, [x0]
Expand All @@ -183,6 +193,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_release_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_release_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casl x3, x2, [x0]
Expand All @@ -199,6 +210,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_release_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_seq_cst_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal w3, w2, [x0]
Expand All @@ -215,6 +227,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_seq_cst_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_seq_cst_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal x3, x2, [x0]
Expand All @@ -231,6 +244,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_seq_cst_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_1_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casb w3, w2, [x0]
Expand All @@ -248,6 +262,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_1_relaxed_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
cas w3, w2, [x0]
Expand All @@ -264,6 +279,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_relaxed_default_impl):

.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
cas x3, x2, [x0]
Expand All @@ -277,3 +293,35 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_relaxed_default_impl):
#endif
1: mov x0, x3
ret

/* Emit .note.gnu.property section in case of PAC or BTI being enabled.
* For more details see "ELF for the Arm® 64-bit Architecture (AArch64)".
* https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst
*/
#ifdef __ARM_FEATURE_BTI_DEFAULT
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 3
#else
#define GNU_PROPERTY_AARCH64_FEATURE 1
#endif
#else
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 2
#else
#define GNU_PROPERTY_AARCH64_FEATURE 0
#endif
#endif

#if (GNU_PROPERTY_AARCH64_FEATURE != 0)
.pushsection .note.gnu.property, "a"
.align 3
.long 4 /* name length */
.long 0x10 /* data length */
.long 5 /* note type: NT_GNU_PROPERTY_TYPE_0 */
.string "GNU" /* vendor name */
.long 0xc0000000 /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
.long 4 /* pr_datasze */
.long GNU_PROPERTY_AARCH64_FEATURE
.long 0
.popsection
#endif
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