[dataflow] [Pass] Enable multi-cache design for larger-scale gemm

[AdrianLiu00]

Description

This PR has three primary contributions as follows:

1. Modify the automated buffer-generation as optional pass for users.
2. Enhance the multi-cache design with a stream-type L3 for tiling.
3. Polish some naming and testcases.

Examples

Under expected conditions, this multi-cache design can significantly enhance performance and enable large-scale computation.
Examples are provided inside.

Future Works

Although the passed csim tests prove the functionality of architecture, there are some notable minor issues:

1. The design contains data-packing technique to improve the efficiency of memory access, but the relevant type system is not well-supported, including efficient data packaging in pythonish testing and type consistency between generated hls code and test inputs. Relevant utility functions are neccessary to develop.
2. The hardware related tests are not conducted yet due to unavailable environment these days. And aforementioned type issues also possibly happen. We can try to solve these problem during enhancing (1).

Checklist

• PR's title starts with a category (e.g. [Bugfix], [IR], [Builder], etc)
• Changes are complete (i.e. I finished coding on this PR)
• All changes have test coverage (It would be better to provide ~2 different test cases to test the robustness of your code)
• Code is well-documented

[chhzh123]

Maybe change the wrapping argument to wrap_io.

Can you be specific about the issues you mentioned in 1? You can also submit a new issue on Github to describe the problem.

[AdrianLiu00]

Sure, I have fixed the naming. I'll file an issue about the specific demands of type system later.

[chhzh123]

LGTM! Thanks for the PR.