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Merge pull request #89 from hdelan/hugh_delaney_slide1_update
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Updating Lecture 1 slides
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rodburns authored Oct 29, 2021
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58 changes: 34 additions & 24 deletions Lesson_Materials/Lecture_01_What_is_SYCL/index.html
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<!--Slide 2-->
<section class="hbox" data-markdown>
## Learning Objectives
* Learn about the SYCL specification and it's implementations
* Learn about the SYCL specification and its implementations
* Learn about the components of a SYCL implementation
* Learn about how a SYCL source file is compiled
* Learn where to find useful resources for SYCL
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</aside>
</section>
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<section>
<div class="hbox" data-markdown>
#### What is SYCL?
</div>
<div class="container" data-markdown>
A first example of SYCL code. Elements will be explained in coming sections!
</div>
<div class="container" data-markdown>
![SYCL](./sycl_first_sample_code.png "SYCL")
</div>
</section>
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<section class="hbox">
<div class="hbox" data-markdown>
#### What is SYCL?
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Your kernel contains the code you want to execute on parallel hardware, i.e the bit you want to accelerate such as a vector addition
</aside>
</section>
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<div class="hbox" data-markdown>
#### What is SYCL?
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</aside>
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#### What is SYCL?
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Other models use language extensions such as pragmas, attributes or keywords to indicate device code
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</section>
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<section class="hbox">
<div class="hbox" data-markdown>
#### What is SYCL?
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Whilst the current specification of SYCL is bound to OpenCL, it is possible to support non-OpenCL back-ends. For example hipSYCL targets AMD's HIP interface and ComputeCpp targets NVidia's ptx instruction set
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</section>
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#### SYCL specification
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![SYCL](./sycl_spec_versions.png "SYCL-OpenCL")
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</section>
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<section class="hbox">
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#### SYCL implementations
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<div class="container" data-markdown>
![SYCL Implementations](./sycl-implementation-targets.jpg "SYCL-Implementations")
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<img src="./sycl_implementation_targets.png" alt="SYCL-Implementations" height=700>
</section>
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#### What a SYCL implementation looks like
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* The device is the parallel unit used to execute the kernels, such as a GPU
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</section>
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#### What a SYCL implementation looks like
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* It loads kernels, tracks data dependencies and schedules commands
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#### What a SYCL implementation looks like
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* The host device can be used to execute kernels without backend drivers and for debugging purposes
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#### What a SYCL implementation looks like
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</div>
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#### What a SYCL implementation looks like
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**IR** = Intermediate Representation **ISA** = Instruction Set Architecture
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</section>
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#### Std C++ compilation model
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* This is the typical compilation model for a C++ source file.
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#### Std C++ compilation model
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* So how do you compile a source file to also target the GPU?
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#### Std C++ compilation model
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* These are defined by submitting them to specific APIs.
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#### Std C++ compilation model
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* This produces a device IR such as SPIR, SPIR-V or PTX or ISA for a specific architecture containing the GPU code.
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</section>
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#### Std C++ compilation model
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* The CPU object is then linked with the device IR or ISA to form a single executable with both the CPU and GPU code.
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</section>
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#### Std C++ compilation model
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* This allows the host compiler (MSVC, Clang, Gcc) to be independent of the SYCL device compiler.
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</section>
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#### Std C++ compilation model
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* Where both the host compiler and SYCL device compiler are invoked from the same driver.
</div>
</section>
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<section data-markdown>
## Where to Get Started with SYCL

* Visit https://www.khronos.org/sycl/ to find the latest SYCL specifications
* Checkout the documentation provided with one of the SYCL implementations.
* Visit https://sycl.tech to find out about all the SYCL implementations, news and videos
</section>
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<section data-markdown>
## Questions
</section>
<!--Slide 24-->
<!--Slide 25-->
<section>
<div class="hbox" data-markdown>
#### Exercise
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