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Merge pull request #6690 from chipsalliance/dependabot/submodules/thi…
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…rd_party/tools/circt-verilog-ff847ed

build(deps): bump third_party/tools/circt-verilog from `029dbd4` to `ff847ed`
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github-actions[bot] authored Jan 3, 2025
2 parents 3fc7d0b + f127b2f commit 7244f3a
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion third_party/tools/circt-verilog
Submodule circt-verilog updated 16 files
+8 −1 frontends/PyCDE/integration_test/esi_test.py
+15 −12 frontends/PyCDE/integration_test/test_software/esi_test.py
+20 −6 frontends/PyCDE/src/pycde/bsp/Makefile.xrt.mk
+10 −1 frontends/PyCDE/src/pycde/handshake.py
+8 −1 frontends/PyCDE/src/pycde/signals.py
+9 −4 frontends/PyCDE/src/pycde/system.py
+13 −7 frontends/PyCDE/test/test_hwarith.py
+1 −1 include/circt/Dialect/FIRRTL/FIRParser.h
+3 −0 lib/Dialect/FIRRTL/Import/FIRParser.cpp
+1 −1 lib/Dialect/FIRRTL/Transforms/GrandCentral.cpp
+1 −1 test/CAPI/firrtl.c
+1 −1 test/Dialect/FIRRTL/emit-basic.mlir
+4 −4 test/Dialect/FIRRTL/parse-basic.fir
+43 −36 test/Dialect/FIRRTL/parse-errors.fir
+1 −1 test/firtool/classes-dedupe.fir
+1 −1 test/firtool/instchoice.fir

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