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[GSOC] integrated support for Zvkg instructions
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SyedHassanUlHaq committed Aug 16, 2024
1 parent 0f188dd commit eaefff0
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Showing 7 changed files with 84 additions and 13 deletions.
4 changes: 2 additions & 2 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@
MODE = machine##
##Can be [machine], [virtual] or [user]; for more info, see https://github.com/riscv/riscv-test-env
##
VLEN = 256##
VLEN = 128##
##Can vary from [64] to [4096] (upper boundary is limited by Spike)
##
XLEN = 64##
Expand Down Expand Up @@ -55,7 +55,7 @@ CONFIGS = configs/

SPIKE = spike
PATCHER_SPIKE = build/pspike
MARCH = rv${XLEN}gcv_zvbb
MARCH = rv${XLEN}gcv_zvbb_zvkg
MABI = lp64d

ifeq ($(XLEN), 32)
Expand Down
19 changes: 19 additions & 0 deletions configs/vghsh.vv.toml
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
name = "vghsh.vv"
format = "vd,vs2,vs1"

[tests]
base = [
[0x0, 0x0],
[0x1, 0x2],
[0x3, 0xf]
]

sew32 = [
[0xfffffff8, 0x00000000],
[0xffffff80, 0xfffffff8],
[0x00007fff, 0x00000000],
[0x00007fff, 0x000007ff],
[0x00007fff, 0x00000001],
[0xffffffff, 0x00000000],
[0xffffffff, 0xffffffff]
]
19 changes: 19 additions & 0 deletions configs/vgmul.vv.toml
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
name = "vgmul.vv"
format = "vd,vs2"

[tests]
base = [
[0x0, 0x0],
[0x1, 0x2],
[0x3, 0xf]
]

sew32 = [
[0xfffffff8, 0x00000000],
[0xffffff80, 0xfffffff8],
[0x00007fff, 0x00000000],
[0x00007fff, 0x000007ff],
[0x00007fff, 0x00000001],
[0xffffffff, 0x00000000],
[0xffffffff, 0xffffffff]
]
6 changes: 5 additions & 1 deletion generator/insn_util.go
Original file line number Diff line number Diff line change
Expand Up @@ -87,6 +87,10 @@ func (v VLEN) Valid() bool {
return 64 <= v && v <= 4096 && v&(v-1) == 0
}

func (v VLEN) Zvkg_validVLEN() bool{
return v == 128
}

type XLEN int

func (x XLEN) Valid(v VLEN) bool {
Expand Down Expand Up @@ -179,4 +183,4 @@ func getVRegs(lmul1 LMUL, v0 bool, seed string) (int, int, int) {
})

return availableOptions[0], availableOptions[1], availableOptions[2]
}
}
26 changes: 18 additions & 8 deletions generator/insn_vdvs2.go
Original file line number Diff line number Diff line change
Expand Up @@ -9,16 +9,28 @@ import (
)

func (i *Insn) genCodeVdVs2(pos int) []string {
s := regexp.MustCompile(`vmv(\d)r.v`)
nr, err := strconv.Atoi(s.FindStringSubmatch(i.Name)[1])
if err != nil {
log.Fatal("unreachable")
zvkg_insn := strings.HasPrefix(i.Name, "vg")
sew32_only := iff(zvkg_insn, []SEW{32}, allSEWs)

var nr int
var err error

if match := regexp.MustCompile(`vmv(\d+)r.v`).FindStringSubmatch(i.Name); len(match) > 1 {
nr, err = strconv.Atoi(match[1])
if err != nil {
log.Fatalf("Error parsing register number: %v", err)
}
}

combinations := i.combinations([]LMUL{LMUL(nr)}, allSEWs, []bool{false}, i.vxrms())

combinations := i.combinations(iff(zvkg_insn, []LMUL{1, 2, 4, 8}, []LMUL{LMUL(nr)}), iff(zvkg_insn, sew32_only, allSEWs), []bool{false}, i.vxrms())
res := make([]string, 0, len(combinations))

for _, c := range combinations[pos:] {
if zvkg_insn && c.Vl % 4 != 0 {
c.Vl = (c.Vl + 3) / 4 * 4
}

builder := strings.Builder{}
builder.WriteString(c.initialize())

Expand All @@ -32,16 +44,14 @@ func (i *Insn) genCodeVdVs2(pos int) []string {

builder.WriteString("# -------------- TEST BEGIN --------------\n")
builder.WriteString(i.gVsetvli(c.Vl, c.SEW, c.LMUL))
builder.WriteString(fmt.Sprintf("%s v%d, v%d\n",
i.Name, vd, vs2))
builder.WriteString(fmt.Sprintf("%s v%d, v%d\n", i.Name, vd, vs2))
builder.WriteString("# -------------- TEST END --------------\n")

builder.WriteString(i.gResultDataAddr())
builder.WriteString(i.gStoreRegisterGroupIntoResultData(vd, c.LMUL, c.SEW))
builder.WriteString(i.gMagicInsn(vd, c.LMUL))

res = append(res, builder.String())

}

return res
Expand Down
12 changes: 11 additions & 1 deletion generator/insn_vdvs2vs1.go
Original file line number Diff line number Diff line change
Expand Up @@ -6,9 +6,19 @@ import (
)

func (i *Insn) genCodeVdVs2Vs1(pos int) []string {
combinations := i.combinations(allLMULs, allSEWs, []bool{false}, i.vxrms())
zvkg_insn := strings.HasPrefix(i.Name, "vg")
sew32_only := iff(zvkg_insn, []SEW{32}, allSEWs)
combinations := i.combinations(
iff(zvkg_insn, []LMUL{1, 2, 4, 8}, allLMULs),
iff(zvkg_insn, sew32_only, allSEWs),
[]bool{false},
i.vxrms(),
)
res := make([]string, 0, len(combinations))
for _, c := range combinations[pos:] {
if zvkg_insn && c.Vl % 4 != 0 {
c.Vl = (c.Vl + 3) / 4 * 4
}
builder := strings.Builder{}
builder.WriteString(c.initialize())

Expand Down
11 changes: 10 additions & 1 deletion main.go
Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,15 @@ func main() {
}
insn, err := generator.ReadInsnFromToml(contents, option)
fatalIf(err)

if strings.HasPrefix(insn.Name, "vg") && !option.VLEN.Zvkg_validVLEN() {
lk.Lock()
fmt.Printf("\033[0;1;31mskipping:\033[0m %s, VLEN is not 128\n", name)
lk.Unlock()
wg.Done()
return
}

if insn.Name != strings.Replace(file.Name(), ".toml", "", -1) {
fatalIf(errors.New("filename and instruction name unmatched"))
}
Expand Down Expand Up @@ -130,4 +139,4 @@ func writeTo(path string, name string, contents string) {
fatalIf(err)
err = os.WriteFile(filepath.Join(path, name), []byte(contents), 0644)
fatalIf(err)
}
}

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