Fix non fp v (#58)

Signed-off-by: Avimitin <[email protected]> Co-authored-by: Jiuyang Liu <[email protected]>
chipsalliance · Dec 25, 2024 · 52ccb79 · 52ccb79
1 parent 1e8ba15
commit 52ccb79
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Showing 6 changed files with 28 additions and 4 deletions.
diff --git a/.gitignore b/.gitignore
@@ -11,4 +11,7 @@ out/
 vendor/
 
 # macOS
-.DS_Store
+.DS_Store
+
+# ccls
+.ccls-cache/
diff --git a/env/ps/riscv_test.h b/env/ps/riscv_test.h
@@ -24,6 +24,11 @@
   RVTEST_VECTOR_ENABLE;                                                 \
   .endm
 
+#define RVTEST_RV64UVX                                                  \
+  .macro init;                                                          \
+  RVTEST_ZVE32X_ENABLE;                                                 \
+  .endm
+
 #define RVTEST_RV32U                                                    \
   .macro init;                                                          \
   .endm
@@ -38,6 +43,11 @@
   RVTEST_VECTOR_ENABLE;                                                 \
   .endm
 
+#define RVTEST_RV32UVX                                                  \
+  .macro init;                                                          \
+  RVTEST_ZVE32X_ENABLE;                                                 \
+  .endm
+
 #define RVTEST_RV64M                                                    \
   .macro init;                                                          \
   RVTEST_ENABLE_MACHINE;                                                \
@@ -112,6 +122,11 @@
   csrwi fcsr, 0;                                                        \
   csrwi vcsr, 0;
 
+#define RVTEST_ZVE32X_ENABLE                                            \
+  li a0, (MSTATUS_VS & (MSTATUS_VS >> 1));                              \
+  csrs mstatus, a0;                                                     \
+  csrwi vcsr, 0;
+
 #define RISCV_MULTICORE_DISABLE                                         \
   csrr a0, mhartid;                                                     \
   1: bnez a0, 1b

diff --git a/env/riscv-test-env b/env/riscv-test-env
diff --git a/generator/insn.go b/generator/insn.go
@@ -18,6 +18,7 @@ type insnFormat string
 type Option struct {
 	VLEN    VLEN
 	XLEN    XLEN
+	Fp      bool
 	Repeat  int
 	Float16 bool
 }
@@ -294,8 +295,8 @@ func (i *Insn) genHeader() string {
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV%dUV
-`, i.Name, i.Option.XLEN)
+RVTEST_RV%dUV%s
+`, i.Name, i.Option.XLEN, iff(i.Option.Fp, "", "X"))
 }
 
 func (i *Insn) genMergedCodeCombinations(splitPerLines int) ([]string, []string) {

diff --git a/main.go b/main.go
@@ -99,6 +99,8 @@ func main() {
 			}
 			if (!strings.HasPrefix(file.Name(), "vf") && !strings.HasPrefix(file.Name(), "vmf")) || strings.HasPrefix(file.Name(), "vfirst") {
 				option.Repeat = 1
+			} else {
+				option.Fp = true
 			}
 
 			insn, err := generator.ReadInsnFromToml(contents, option)

diff --git a/single/single.go b/single/single.go
@@ -62,7 +62,10 @@ func main() {
 
 	if (!strings.HasPrefix(filepath.Base(fp), "vf") && !strings.HasPrefix(filepath.Base(fp), "vmf")) || strings.HasPrefix(filepath.Base(fp), "vfirst") {
 		option.Repeat = 1
+	} else {
+		option.Fp = true
 	}
+
 	insn, err := generator.ReadInsnFromToml(contents, option)
 	fatalIf(err)