Merge pull request #3786 from alainmarcel/alainmarcel-patch-1

rggen support

third_party/tests/CoresSweRVMP/CoresSweRVMP.log

@@ -139,16 +139,16 @@ CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
 [ 18%] Generating 12_beh_lib.sv
 [ 25%] Generating 13_ifu_mem_ctl.sv
 [ 31%] Generating 14_mem_lib.sv
-[ 37%] Generating 15_exu.sv
-[ 43%] Generating 16_dec_decode_ctl.sv
+[ 37%] Generating 16_dec_decode_ctl.sv
 [ 50%] Generating 1_lsu_stbuf.sv
+[ 50%] Generating 15_exu.sv
 [ 56%] Generating 2_ahb_to_axi4.sv
 [ 62%] Generating 3_rvjtag_tap.sv
 [ 68%] Generating 4_dec_tlu_ctl.sv
 [ 75%] Generating 5_lsu_bus_buffer.sv
-[ 81%] Generating 8_ifu_aln_ctl.sv
-[ 87%] Generating 7_axi4_to_ahb.sv
-[ 93%] Generating 6_dbg.sv
+[ 81%] Generating 7_axi4_to_ahb.sv
+[ 87%] Generating 6_dbg.sv
+[ 93%] Generating 8_ifu_aln_ctl.sv
 [100%] Generating 9_tb_top.sv
 [100%] Built target Parse
 Surelog parsing status: 0

third_party/tests/rggen/Rggen.sl

@@ -0,0 +1 @@
+-elabuhdm  -nopython -parse -verbose --top-module rggen -Itests/generated/rggen rggen-sv-rtl/rggen_rtl_pkg.sv rggen-sv-rtl/rggen_or_reducer.sv rggen-sv-rtl/rggen_mux.sv rggen-sv-rtl/rggen_bit_field_if.sv rggen-sv-rtl/rggen_bit_field.sv rggen-sv-rtl/rggen_bit_field_w01trg.sv rggen-sv-rtl/rggen_register_if.sv rggen-sv-rtl/rggen_address_decoder.sv rggen-sv-rtl/rggen_register_common.sv rggen-sv-rtl/rggen_default_register.sv rggen-sv-rtl/rggen_external_register.sv rggen-sv-rtl/rggen_indirect_register.sv rggen-sv-rtl/rggen_bus_if.sv rggen-sv-rtl/rggen_adapter_common.sv rggen-sv-rtl/rggen_apb_if.sv rggen-sv-rtl/rggen_apb_adapter.sv rggen-sv-rtl/rggen_apb_bridge.sv rggen-sample/block_0.sv rggen-sample/block_1.sv tests/generated/rggen/rggen.sv

third_party/tests/rggen/rggen-sample/LICENSE

@@ -0,0 +1,21 @@
+MIT License
+
+Copyright (c) 2019-2023 Taichi Ishitani
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

third_party/tests/rggen/rggen-sample/block_0.h

@@ -0,0 +1,330 @@
+#ifndef BLOCK_0_H
+#define BLOCK_0_H
+#include "stdint.h"
+#define BLOCK_0_REGISTER_0_BIT_FIELD_0_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_0_BIT_FIELD_0_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_0_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_0_BIT_FIELD_1_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_0_BIT_FIELD_1_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_0_BIT_FIELD_1_BIT_OFFSET 4
+#define BLOCK_0_REGISTER_0_BIT_FIELD_2_BIT_WIDTH 1
+#define BLOCK_0_REGISTER_0_BIT_FIELD_2_BIT_MASK 0x1
+#define BLOCK_0_REGISTER_0_BIT_FIELD_2_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_0_BIT_FIELD_3_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_0_BIT_FIELD_3_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_0_BIT_FIELD_3_BIT_OFFSET 9
+#define BLOCK_0_REGISTER_0_BIT_FIELD_4_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_0_BIT_FIELD_4_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_0_BIT_FIELD_4_BIT_OFFSET 11
+#define BLOCK_0_REGISTER_0_BIT_FIELD_5_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_0_BIT_FIELD_5_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_0_BIT_FIELD_5_BIT_OFFSET 13
+#define BLOCK_0_REGISTER_0_BIT_FIELD_6_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_0_BIT_FIELD_6_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_0_BIT_FIELD_6_BIT_OFFSET 15
+#define BLOCK_0_REGISTER_0_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_0_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_0_BYTE_OFFSET 0x0
+#define BLOCK_0_REGISTER_1_BIT_WIDTH 1
+#define BLOCK_0_REGISTER_1_BIT_MASK 0x1
+#define BLOCK_0_REGISTER_1_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_1_FOO 0x0
+#define BLOCK_0_REGISTER_1_BAR 0x1
+#define BLOCK_0_REGISTER_1_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_1_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_1_BYTE_OFFSET 0x4
+#define BLOCK_0_REGISTER_2_BIT_FIELD_0_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_2_BIT_FIELD_0_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_2_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_2_BIT_FIELD_1_BIT_WIDTH 8
+#define BLOCK_0_REGISTER_2_BIT_FIELD_1_BIT_MASK 0xff
+#define BLOCK_0_REGISTER_2_BIT_FIELD_1_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_2_BIT_FIELD_2_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_2_BIT_FIELD_2_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_2_BIT_FIELD_2_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_2_BIT_FIELD_3_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_2_BIT_FIELD_3_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_2_BIT_FIELD_3_BIT_OFFSET 20
+#define BLOCK_0_REGISTER_2_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_2_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_2_BYTE_OFFSET 0x8
+#define BLOCK_0_REGISTER_3_BIT_FIELD_0_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_3_BIT_FIELD_0_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_3_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_3_BIT_FIELD_1_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_3_BIT_FIELD_1_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_3_BIT_FIELD_1_BIT_OFFSET 4
+#define BLOCK_0_REGISTER_3_BIT_FIELD_2_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_3_BIT_FIELD_2_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_3_BIT_FIELD_2_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_3_BIT_FIELD_3_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_3_BIT_FIELD_3_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_3_BIT_FIELD_3_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_3_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_3_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_3_BYTE_OFFSET 0x8
+#define BLOCK_0_REGISTER_4_BIT_FIELD_0_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_4_BIT_FIELD_0_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_4_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_4_BIT_FIELD_1_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_4_BIT_FIELD_1_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_4_BIT_FIELD_1_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_4_BIT_FIELD_2_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_4_BIT_FIELD_2_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_4_BIT_FIELD_2_BIT_OFFSET 12
+#define BLOCK_0_REGISTER_4_BIT_FIELD_3_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_4_BIT_FIELD_3_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_4_BIT_FIELD_3_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_4_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_4_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_4_BYTE_OFFSET 0xc
+#define BLOCK_0_REGISTER_5_BIT_FIELD_0_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_0_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_5_BIT_FIELD_1_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_1_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_1_BIT_OFFSET 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_2_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_2_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_2_BIT_OFFSET 4
+#define BLOCK_0_REGISTER_5_BIT_FIELD_3_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_3_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_3_BIT_OFFSET 6
+#define BLOCK_0_REGISTER_5_BIT_FIELD_4_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_4_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_4_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_5_BIT_FIELD_5_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_5_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_5_BIT_OFFSET 10
+#define BLOCK_0_REGISTER_5_BIT_FIELD_6_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_6_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_6_BIT_OFFSET 12
+#define BLOCK_0_REGISTER_5_BIT_FIELD_7_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_7_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_7_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_5_BIT_FIELD_8_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_8_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_8_BIT_OFFSET 18
+#define BLOCK_0_REGISTER_5_BIT_FIELD_9_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_5_BIT_FIELD_9_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_5_BIT_FIELD_9_BIT_OFFSET 20
+#define BLOCK_0_REGISTER_5_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_5_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_5_BYTE_OFFSET 0x10
+#define BLOCK_0_REGISTER_6_BIT_FIELD_0_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_0_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_6_BIT_FIELD_1_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_1_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_1_BIT_OFFSET 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_2_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_2_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_2_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_6_BIT_FIELD_3_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_3_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_3_BIT_OFFSET 12
+#define BLOCK_0_REGISTER_6_BIT_FIELD_4_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_4_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_4_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_6_BIT_FIELD_5_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_5_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_5_BIT_OFFSET 20
+#define BLOCK_0_REGISTER_6_BIT_FIELD_6_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_6_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_6_BIT_OFFSET 24
+#define BLOCK_0_REGISTER_6_BIT_FIELD_7_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_7_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_7_BIT_OFFSET 28
+#define BLOCK_0_REGISTER_6_BIT_FIELD_8_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_8_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_8_BIT_OFFSET 32
+#define BLOCK_0_REGISTER_6_BIT_FIELD_9_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_6_BIT_FIELD_9_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_6_BIT_FIELD_9_BIT_OFFSET 36
+#define BLOCK_0_REGISTER_6_BYTE_WIDTH 8
+#define BLOCK_0_REGISTER_6_BYTE_SIZE 8
+#define BLOCK_0_REGISTER_6_BYTE_OFFSET 0x14
+#define BLOCK_0_REGISTER_7_BIT_FIELD_0_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_7_BIT_FIELD_0_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_7_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_7_BIT_FIELD_1_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_7_BIT_FIELD_1_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_7_BIT_FIELD_1_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_7_BIT_FIELD_2_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_7_BIT_FIELD_2_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_7_BIT_FIELD_2_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_7_BIT_FIELD_3_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_7_BIT_FIELD_3_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_7_BIT_FIELD_3_BIT_OFFSET 24
+#define BLOCK_0_REGISTER_7_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_7_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_7_BYTE_OFFSET 0x1c
+#define BLOCK_0_REGISTER_8_BIT_FIELD_0_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_8_BIT_FIELD_0_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_8_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_8_BIT_FIELD_1_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_8_BIT_FIELD_1_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_8_BIT_FIELD_1_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_8_BIT_FIELD_2_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_8_BIT_FIELD_2_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_8_BIT_FIELD_2_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_8_BIT_FIELD_3_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_8_BIT_FIELD_3_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_8_BIT_FIELD_3_BIT_OFFSET 24
+#define BLOCK_0_REGISTER_8_BIT_FIELD_4_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_8_BIT_FIELD_4_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_8_BIT_FIELD_4_BIT_OFFSET 32
+#define BLOCK_0_REGISTER_8_BIT_FIELD_5_BIT_WIDTH 4
+#define BLOCK_0_REGISTER_8_BIT_FIELD_5_BIT_MASK 0xf
+#define BLOCK_0_REGISTER_8_BIT_FIELD_5_BIT_OFFSET 40
+#define BLOCK_0_REGISTER_8_BYTE_WIDTH 8
+#define BLOCK_0_REGISTER_8_BYTE_SIZE 8
+#define BLOCK_0_REGISTER_8_BYTE_OFFSET 0x20
+#define BLOCK_0_REGISTER_9_BIT_FIELD_0_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_9_BIT_FIELD_0_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_9_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_9_BIT_FIELD_1_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_9_BIT_FIELD_1_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_9_BIT_FIELD_1_BIT_OFFSET 2
+#define BLOCK_0_REGISTER_9_BIT_FIELD_2_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_9_BIT_FIELD_2_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_9_BIT_FIELD_2_BIT_OFFSET 4
+#define BLOCK_0_REGISTER_9_BIT_FIELD_3_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_9_BIT_FIELD_3_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_9_BIT_FIELD_3_BIT_OFFSET 6
+#define BLOCK_0_REGISTER_9_BIT_FIELD_4_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_9_BIT_FIELD_4_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_9_BIT_FIELD_4_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_9_BIT_FIELD_5_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_9_BIT_FIELD_5_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_9_BIT_FIELD_5_BIT_OFFSET 10
+#define BLOCK_0_REGISTER_9_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_9_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_9_BYTE_OFFSET 0x28
+#define BLOCK_0_REGISTER_10_BIT_FIELD_0_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_10_BIT_FIELD_0_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_10_BIT_FIELD_0_BIT_OFFSET_0 0
+#define BLOCK_0_REGISTER_10_BIT_FIELD_0_BIT_OFFSET_1 8
+#define BLOCK_0_REGISTER_10_BIT_FIELD_0_BIT_OFFSET_2 16
+#define BLOCK_0_REGISTER_10_BIT_FIELD_0_BIT_OFFSET_3 24
+#define BLOCK_0_REGISTER_10_BIT_FIELD_1_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_10_BIT_FIELD_1_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_10_BIT_FIELD_1_BIT_OFFSET_0 2
+#define BLOCK_0_REGISTER_10_BIT_FIELD_1_BIT_OFFSET_1 10
+#define BLOCK_0_REGISTER_10_BIT_FIELD_1_BIT_OFFSET_2 18
+#define BLOCK_0_REGISTER_10_BIT_FIELD_1_BIT_OFFSET_3 26
+#define BLOCK_0_REGISTER_10_BIT_FIELD_2_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_10_BIT_FIELD_2_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_10_BIT_FIELD_2_BIT_OFFSET_0 4
+#define BLOCK_0_REGISTER_10_BIT_FIELD_2_BIT_OFFSET_1 12
+#define BLOCK_0_REGISTER_10_BIT_FIELD_2_BIT_OFFSET_2 20
+#define BLOCK_0_REGISTER_10_BIT_FIELD_2_BIT_OFFSET_3 28
+#define BLOCK_0_REGISTER_10_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_10_BYTE_SIZE 32
+#define BLOCK_0_REGISTER_10_ARRAY_DIMENSION 1
+#define BLOCK_0_REGISTER_10_ARRAY_SIZE_0 4
+#define BLOCK_0_REGISTER_10_BYTE_OFFSET_0 0x30
+#define BLOCK_0_REGISTER_10_BYTE_OFFSET_1 0x38
+#define BLOCK_0_REGISTER_10_BYTE_OFFSET_2 0x40
+#define BLOCK_0_REGISTER_10_BYTE_OFFSET_3 0x48
+#define BLOCK_0_REGISTER_11_BIT_FIELD_0_BIT_WIDTH 8
+#define BLOCK_0_REGISTER_11_BIT_FIELD_0_BIT_MASK 0xff
+#define BLOCK_0_REGISTER_11_BIT_FIELD_0_BIT_OFFSET_0 0
+#define BLOCK_0_REGISTER_11_BIT_FIELD_0_BIT_OFFSET_1 16
+#define BLOCK_0_REGISTER_11_BIT_FIELD_0_BIT_OFFSET_2 32
+#define BLOCK_0_REGISTER_11_BIT_FIELD_0_BIT_OFFSET_3 48
+#define BLOCK_0_REGISTER_11_BIT_FIELD_1_BIT_WIDTH 8
+#define BLOCK_0_REGISTER_11_BIT_FIELD_1_BIT_MASK 0xff
+#define BLOCK_0_REGISTER_11_BIT_FIELD_1_BIT_OFFSET_0 8
+#define BLOCK_0_REGISTER_11_BIT_FIELD_1_BIT_OFFSET_1 24
+#define BLOCK_0_REGISTER_11_BIT_FIELD_1_BIT_OFFSET_2 40
+#define BLOCK_0_REGISTER_11_BIT_FIELD_1_BIT_OFFSET_3 56
+#define BLOCK_0_REGISTER_11_BYTE_WIDTH 8
+#define BLOCK_0_REGISTER_11_BYTE_SIZE 8
+#define BLOCK_0_REGISTER_11_ARRAY_DIMENSION 2
+#define BLOCK_0_REGISTER_11_ARRAY_SIZE_0 2
+#define BLOCK_0_REGISTER_11_ARRAY_SIZE_1 4
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_0_0 0x50
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_0_1 0x50
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_0_2 0x50
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_0_3 0x50
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_1_0 0x50
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_1_1 0x50
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_1_2 0x50
+#define BLOCK_0_REGISTER_11_BYTE_OFFSET_1_3 0x50
+#define BLOCK_0_REGISTER_12_BIT_FIELD_0_BIT_WIDTH 1
+#define BLOCK_0_REGISTER_12_BIT_FIELD_0_BIT_MASK 0x1
+#define BLOCK_0_REGISTER_12_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_12_BIT_FIELD_1_BIT_WIDTH 1
+#define BLOCK_0_REGISTER_12_BIT_FIELD_1_BIT_MASK 0x1
+#define BLOCK_0_REGISTER_12_BIT_FIELD_1_BIT_OFFSET 32
+#define BLOCK_0_REGISTER_12_BYTE_WIDTH 8
+#define BLOCK_0_REGISTER_12_BYTE_SIZE 8
+#define BLOCK_0_REGISTER_12_BYTE_OFFSET 0x50
+#define BLOCK_0_REGISTER_13_BIT_FIELD_0_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_0_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_0_BIT_OFFSET 0
+#define BLOCK_0_REGISTER_13_BIT_FIELD_1_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_1_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_1_BIT_OFFSET 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_2_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_2_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_2_BIT_OFFSET 4
+#define BLOCK_0_REGISTER_13_BIT_FIELD_3_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_3_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_3_BIT_OFFSET 6
+#define BLOCK_0_REGISTER_13_BIT_FIELD_4_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_4_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_4_BIT_OFFSET 8
+#define BLOCK_0_REGISTER_13_BIT_FIELD_5_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_5_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_5_BIT_OFFSET 10
+#define BLOCK_0_REGISTER_13_BIT_FIELD_6_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_6_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_6_BIT_OFFSET 12
+#define BLOCK_0_REGISTER_13_BIT_FIELD_7_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_7_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_7_BIT_OFFSET 14
+#define BLOCK_0_REGISTER_13_BIT_FIELD_8_BIT_WIDTH 2
+#define BLOCK_0_REGISTER_13_BIT_FIELD_8_BIT_MASK 0x3
+#define BLOCK_0_REGISTER_13_BIT_FIELD_8_BIT_OFFSET 16
+#define BLOCK_0_REGISTER_13_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_13_BYTE_SIZE 4
+#define BLOCK_0_REGISTER_13_BYTE_OFFSET 0x60
+#define BLOCK_0_REGISTER_15_BYTE_WIDTH 4
+#define BLOCK_0_REGISTER_15_BYTE_SIZE 128
+#define BLOCK_0_REGISTER_15_BYTE_OFFSET 0x80
+typedef union {
+  uint32_t register_2;
+  uint32_t register_3;
+} block_0_reg_0x08_t;
+typedef union {
+  uint64_t register_11;
+  uint64_t register_12;
+} block_0_reg_0x50_t;
+typedef struct {
+  uint32_t register_0;
+  uint32_t register_1;
+  block_0_reg_0x08_t reg_0x08;
+  uint32_t register_4;
+  uint32_t register_5;
+  uint64_t register_6;
+  uint32_t register_7;
+  uint64_t register_8;
+  uint32_t register_9;
+  uint32_t __reserved_0x2c;
+  uint64_t register_10[4];
+  block_0_reg_0x50_t reg_0x50;
+  uint32_t __reserved_0x58;
+  uint32_t __reserved_0x5c;
+  uint32_t register_13;
+  uint32_t __reserved_0x64;
+  uint32_t __reserved_0x68;
+  uint32_t __reserved_0x6c;
+  uint32_t __reserved_0x70;
+  uint32_t __reserved_0x74;
+  uint32_t __reserved_0x78;
+  uint32_t __reserved_0x7c;
+  uint32_t register_15[32];
+} block_0_t;
+#endif