Merge pull request #3791 from alainmarcel/alainmarcel-patch-1

double loop gen scope param
chipsalliance · Aug 7, 2023 · 1fe8e84 · 1fe8e84
2 parents 4ff5777 + 9ba0491
commit 1fe8e84
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Showing 12 changed files with 836 additions and 28 deletions.
diff --git a/include/Surelog/Design/ModuleInstance.h b/include/Surelog/Design/ModuleInstance.h
@@ -32,6 +32,7 @@
 #include <Surelog/SourceCompile/VObjectTypes.h>
 
 #include <string_view>
+#include <uhdm/Serializer.h>
 
 namespace SURELOG {
 
@@ -93,7 +94,7 @@ class ModuleInstance : public ValuedComponentI {
 
   void setNodeId(NodeId id) { m_nodeId = id; }  // Used for generate stmt
   void overrideParentChild(ModuleInstance* parent, ModuleInstance* interm,
-                           ModuleInstance* child);
+                           ModuleInstance* child, UHDM::Serializer& s);
   Netlist* getNetlist() { return m_netlist; }
   void setNetlist(Netlist* netlist) { m_netlist = netlist; }
 

diff --git a/src/Design/ModuleInstance.cpp b/src/Design/ModuleInstance.cpp
@@ -33,6 +33,7 @@
 #include <uhdm/constant.h>
 #include <uhdm/param_assign.h>
 #include <uhdm/ref_obj.h>
+#include <uhdm/uhdm.h>
 #include <uhdm/vpi_visitor.h>
 
 namespace SURELOG {
@@ -297,7 +298,8 @@ std::string_view ModuleInstance::getModuleName() const {
 
 void ModuleInstance::overrideParentChild(ModuleInstance* parent,
                                          ModuleInstance* interm,
-                                         ModuleInstance* child) {
+                                         ModuleInstance* child,
+                                         UHDM::Serializer& s) {
   if (parent != this) return;
   Netlist* netlist = interm->getNetlist();
   if (netlist) {
@@ -307,6 +309,41 @@ void ModuleInstance::overrideParentChild(ModuleInstance* parent,
         netlist->interface_arrays() || netlist->interfaces())
       return;
   }
+
+  // Loop indexes
+  Netlist* child_netlist = child->getNetlist();
+  for (auto& param : interm->getMappedValues()) {
+    const std::string_view name = param.first;
+    Value* val = param.second.first;
+    auto params = child_netlist->param_assigns();
+    if (params == nullptr) {
+      params = s.MakeParam_assignVec();
+    }
+    child_netlist->param_assigns(params);
+    bool found = false;
+    for (auto p : *params) {
+      if (p->VpiName() == name) {
+        found = true;
+        break;
+      }
+    }
+    if (!found) {
+      UHDM::parameter* p = s.MakeParameter();
+      p->VpiName(name);
+      if (val && val->isValid()) p->VpiValue(val->uhdmValue());
+      p->VpiLineNo(param.second.second);
+      p->VpiLocalParam(true);
+      UHDM::int_typespec* ts = s.MakeInt_typespec();
+      p->Typespec(ts);
+      UHDM::param_assign* pass = s.MakeParam_assign();
+      pass->Lhs(p);
+      UHDM::constant* c = s.MakeConstant();
+      c->VpiValue(val->uhdmValue());
+      pass->Rhs(c);
+      params->push_back(pass);
+    }
+  }
+
   child->m_parent = this;
   std::vector<ModuleInstance*> children;
 

diff --git a/src/DesignCompile/DesignElaboration.cpp b/src/DesignCompile/DesignElaboration.cpp
@@ -2476,6 +2476,7 @@ void DesignElaboration::checkConfigurations_() {
 
 void DesignElaboration::reduceUnnamedBlocks_() {
   Design* design = m_compileDesign->getCompiler()->getDesign();
+  UHDM::Serializer& s = m_compileDesign->getSerializer();
   std::queue<ModuleInstance*> queue;
   for (auto instance : design->getTopLevelModuleInstances()) {
     queue.push(instance);
@@ -2519,18 +2520,18 @@ void DesignElaboration::reduceUnnamedBlocks_() {
             StringUtils::leaf(parent->getModuleName());
         if (typeP == VObjectType::paGenerate_region) {
           parent->getParent()->overrideParentChild(parent->getParent(), parent,
-                                                   current);
+                                                   current, s);
         } else if (fullModName.find("genblk") != std::string::npos) {
           if (fullModName == fullModNameP)
             parent->getParent()->overrideParentChild(parent->getParent(),
-                                                     parent, current);
+                                                     parent, current, s);
         } else {
           if (type == VObjectType::paGenerate_item &&
               typeP == VObjectType::paGenerate_item) {
           } else {
             if (fullModNameP.find("genblk") != std::string::npos)
               parent->getParent()->overrideParentChild(parent->getParent(),
-                                                       parent, current);
+                                                       parent, current, s);
           }
         }
       }

diff --git a/src/DesignCompile/UhdmWriter.cpp b/src/DesignCompile/UhdmWriter.cpp
@@ -469,6 +469,22 @@ bool writeElabParameters(Serializer& s, ModuleInstance* instance,
     }
   }
 
+  if (netlist->param_assigns()) {
+    VectorOfany* params = m->Parameters();
+    if (params == nullptr) params = s.MakeAnyVec();
+    m->Parameters(params);
+    for (auto p : *netlist->param_assigns()) {
+      bool found = false;
+      for (auto pt : *params) {
+        if (pt->VpiName() == p->Lhs()->VpiName()) {
+          found = true;
+          break;
+        }
+      }
+      if (!found) params->push_back(p->Lhs());
+    }
+  }
+
   if (netlist->param_assigns()) {
     for (auto ps : *m->Param_assigns()) {
       ps->VpiParent(m);

diff --git a/tests/BlackboxMissingDef/BlackboxMissingDef.log b/tests/BlackboxMissingDef/BlackboxMissingDef.log
@@ -344,6 +344,18 @@ design: (work@top)
     \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BlackboxMissingDef/dut.sv, line:1:1, endln:5:10
     |vpiName:pll
     |vpiFullName:[email protected]
+    |vpiParameter:
+    \_parameter: ([email protected])
+      |vpiParent:
+      \_param_assign: 
+      |vpiName:TEST
+      |vpiFullName:[email protected]
+    |vpiParameter:
+    \_parameter: ([email protected])
+      |vpiParent:
+      \_param_assign: 
+      |vpiName:TEST2
+      |vpiFullName:[email protected]
     |vpiParamAssign:
     \_param_assign: 
       |vpiParent:
@@ -357,10 +369,6 @@ design: (work@top)
         |vpiConstType:6
       |vpiLhs:
       \_parameter: ([email protected])
-        |vpiParent:
-        \_param_assign: 
-        |vpiName:TEST
-        |vpiFullName:[email protected]
     |vpiParamAssign:
     \_param_assign: 
       |vpiParent:
@@ -374,10 +382,6 @@ design: (work@top)
         |vpiConstType:9
       |vpiLhs:
       \_parameter: ([email protected])
-        |vpiParent:
-        \_param_assign: 
-        |vpiName:TEST2
-        |vpiFullName:[email protected]
     |vpiDefName:work@top::PLLE2_ADV
     |vpiInstance:
     \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BlackboxMissingDef/dut.sv, line:1:1, endln:5:10