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ch32-riscv-ug · Nov 9, 2024 · aaedb13 · aaedb13
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diff --git a/EVT/CH32V20x_List.txt b/EVT/CH32V20x_List.txt
@@ -1,5 +1,5 @@
 
-�Ͼ��ߺ�΢���ӹɷ����޹�˾ 2024.04
+�Ͼ��ߺ�΢���ӹɷ����޹�˾ 2024.10
 ���������뵽���ǵ���վ�ϲ�ѯ
 https://wch.cn
 
@@ -20,7 +20,7 @@ https://wch.cn
   |      |      |      |      |-- Ld��ld�ļ�  
   |      |      |      |      |-- Peripheral��������������Դ�ļ���ͷ�ļ�
   |      |      |      |      |-- Startup�������ļ�������û�ʹ��оƬ�ͺŰ���������Ӧ�������ļ���ͬʱ��ch32v20x.h�ļ���ѡ��ƥ��оƬ�ͺŶ��� 
-  |      |      |      |      |      |-- startup_ch32v20x_D6.S��������CH32V203F6-CH32V203G6-CH32V203K6-CH32V203K8-CH32V203C6-CH32V203C8-CH32V203G8ϵ��
+  |      |      |      |      |      |-- startup_ch32v20x_D6.S��������CH32V203F6-CH32V203G6-CH32V203K8-CH32V203C6-CH32V203C8-CH32V203G8ϵ��
   |      |      |      |      |      |-- startup_ch32v20x_D8.S��������CH32V203RBϵ��
   |      |      |      |      |      |-- startup_ch32v20x_D8W.S��������CH32V208ϵ��  
   |      |      |      |-- ADC
@@ -157,6 +157,7 @@ https://wch.cn
   |      |      |      |      |-- Stop_Mode���͹��ģ�ͣ��ģʽ����
   |      |      |      |      |-- Standby_RAM_LV_Mode������ģʽ����LVʱ��RAM 2K��30K�͹������ݱ�������
   |      |      |      |      |-- Standby_RAM_Mode������ģʽ������LVʱ��RAM 2K��30K�͹������ݱ�������
+  |      |      |      |      |-- Standby_RAM_Application������ģʽ��RAM 2K��30K�͹������ݱ���Ӧ������
   |      |      |      |      |-- PVD_Wakeup��STOPģʽPVD�жϻ�������
   |      |      |      |      |-- PVD_VoltageJudger��PVD��ѹ�ж�����
   |      |      |      |-- PMP
@@ -198,6 +199,7 @@ https://wch.cn
   |      |      |      |      |-- Synchro_Timer����ʱ��ͬ��ģʽ
   |      |      |      |      |-- TIM_DMA����ʱ��ʹ��DMA����
   |      |      |      |      |-- Encoder����ʱ������������
+  |      |      |      |      |-- TIM_INT����ʱ���ж�����
   |      |      |      |-- TOUCHKEY
   |      |      |      |      |-- TKey��TouchKey�������  
   |      |      |      |-- USART

diff --git a/EVT/CH32V20x_List_EN.txt b/EVT/CH32V20x_List_EN.txt
@@ -1,5 +1,5 @@
 
-Nanjing Qinheng Microelectronics Co., Ltd. 2024.04
+Nanjing Qinheng Microelectronics Co., Ltd. 2024.08
 
 https://wch-ic.com
 
@@ -19,7 +19,7 @@ Directory
   |      |      |      |      |-- Ld: ld file  
   |      |      |      |      |-- Peripheral: basic peripheral driver source file and header file
   |      |      |      |      |-- Startup: startup file. For different devices selected by users, the following 3 startup files are provided, and the matched device definition is selected in the ch32v20x.h file.
-  |      |      |      |      |      |-- startup_ch32v20x_D6.S: applied to the CH32V203F6-CH32V203G6-CH32V203K6-CH32V203K8-CH32V203C6-CH32V203C8-CH32V203G8
+  |      |      |      |      |      |-- startup_ch32v20x_D6.S: applied to the CH32V203F6-CH32V203G6-CH32V203K8-CH32V203C6-CH32V203C8-CH32V203G8
   |      |      |      |      |      |-- startup_ch32v20x_D8.S: applied to the CH32V203RB
   |      |      |      |      |      |-- startup_ch32v20x_D8W.S: applied to the CH32V208  
   |      |      |      |-- ADC
@@ -156,8 +156,10 @@ Directory
   |      |      |      |      |-- Stop_Mode: low power, stop mode routine
   |      |      |      |      |-- Standby_RAM_LV_Mode: when LV is enabled in standby mode, RAM 2k and 30K low-power data holding routines
   |      |      |      |      |-- Standby_RAM_Mode:when LV is not enabled in standby mode, RAM 2k and 30K low-power data holding routines
+  |      |      |      |      |-- Standby_RAM_Application：When MCU in standby mode, RAM 2k and 30K low-power data holding application routine
   |      |      |      |      |-- PVD_Wakeup：STOP mode PVD wakeup MCU Routine
   |      |      |      |      |-- PVD_VoltageJudger：PVD voltage Judger Routine
+  |      |      |      |      |-- Standby_RAM_Application：RAM data holding in standby mode Routine
   |      |      |      |-- PMP
   |      |      |      |      |-- PMP：Physical memory protection Routine
   |      |      |      |-- RCC
@@ -197,6 +199,7 @@ Directory
   |      |      |      |      |-- Synchro_Timer:timer synchronization mode
   |      |      |      |      |-- TIM_DMA: timer DMA routines
   |      |      |      |      |-- Encode:Timer encoder mode routines
+  |      |      |      |      |-- TIM_INT:Timer interput mode routines
   |      |      |      |-- TOUCHKEY
   |      |      |      |      |-- TKey:TouchKey Detection Routine 
   |      |      |      |-- USART

diff --git a/EVT/EXAM/ADC/ADC_DMA/User/ch32v20x_it.c b/EVT/EXAM/ADC/ADC_DMA/User/ch32v20x_it.c
@@ -38,6 +38,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/ADC_DMA/User/system_ch32v20x.c b/EVT/EXAM/ADC/ADC_DMA/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/AnalogWatchdog/User/ch32v20x_it.c b/EVT/EXAM/ADC/AnalogWatchdog/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/AnalogWatchdog/User/system_ch32v20x.c b/EVT/EXAM/ADC/AnalogWatchdog/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/Auto_Injection/User/ch32v20x_it.c b/EVT/EXAM/ADC/Auto_Injection/User/ch32v20x_it.c
@@ -36,6 +36,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/Auto_Injection/User/system_ch32v20x.c b/EVT/EXAM/ADC/Auto_Injection/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/Discontinuous_mode/User/ch32v20x_it.c b/EVT/EXAM/ADC/Discontinuous_mode/User/ch32v20x_it.c
@@ -38,6 +38,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/Discontinuous_mode/User/system_ch32v20x.c b/EVT/EXAM/ADC/Discontinuous_mode/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/DualADC_AlternateTrigger/User/ch32v20x_it.c b/EVT/EXAM/ADC/DualADC_AlternateTrigger/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/DualADC_AlternateTrigger/User/system_ch32v20x.c b/EVT/EXAM/ADC/DualADC_AlternateTrigger/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/DualADC_Combined_RegInjectionSimul/User/ch32v20x_it.c b/EVT/EXAM/ADC/DualADC_Combined_RegInjectionSimul/User/ch32v20x_it.c
@@ -38,6 +38,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/DualADC_Combined_RegInjectionSimul/User/system_ch32v20x.c b/EVT/EXAM/ADC/DualADC_Combined_RegInjectionSimul/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/DualADC_FastInterleaved/User/ch32v20x_it.c b/EVT/EXAM/ADC/DualADC_FastInterleaved/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/DualADC_FastInterleaved/User/system_ch32v20x.c b/EVT/EXAM/ADC/DualADC_FastInterleaved/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/DualADC_InjectionSimul/User/ch32v20x_it.c b/EVT/EXAM/ADC/DualADC_InjectionSimul/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/DualADC_InjectionSimul/User/system_ch32v20x.c b/EVT/EXAM/ADC/DualADC_InjectionSimul/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/DualADC_RegSimul/User/ch32v20x_it.c b/EVT/EXAM/ADC/DualADC_RegSimul/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/DualADC_RegSimul/User/system_ch32v20x.c b/EVT/EXAM/ADC/DualADC_RegSimul/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/DualADC_SlowInterleaved/User/ch32v20x_it.c b/EVT/EXAM/ADC/DualADC_SlowInterleaved/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/DualADC_SlowInterleaved/User/system_ch32v20x.c b/EVT/EXAM/ADC/DualADC_SlowInterleaved/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/ExtLines_Trigger/User/ch32v20x_it.c b/EVT/EXAM/ADC/ExtLines_Trigger/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/ExtLines_Trigger/User/system_ch32v20x.c b/EVT/EXAM/ADC/ExtLines_Trigger/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/Internal_Temperature/User/ch32v20x_it.c b/EVT/EXAM/ADC/Internal_Temperature/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/Internal_Temperature/User/system_ch32v20x.c b/EVT/EXAM/ADC/Internal_Temperature/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/TIM_Trigger/User/ch32v20x_it.c b/EVT/EXAM/ADC/TIM_Trigger/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/TIM_Trigger/User/system_ch32v20x.c b/EVT/EXAM/ADC/TIM_Trigger/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/ADC/Temperature_External_channel/User/ch32v20x_it.c b/EVT/EXAM/ADC/Temperature_External_channel/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/ADC/Temperature_External_channel/User/system_ch32v20x.c b/EVT/EXAM/ADC/Temperature_External_channel/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/APPLICATION/USBPD/I2C_OP_CH223/User/ch32v20x_it.c b/EVT/EXAM/APPLICATION/USBPD/I2C_OP_CH223/User/ch32v20x_it.c
@@ -37,6 +37,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

diff --git a/EVT/EXAM/APPLICATION/USBPD/I2C_OP_CH223/User/system_ch32v20x.c b/EVT/EXAM/APPLICATION/USBPD/I2C_OP_CH223/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/APPLICATION/WS2812_LED/User/system_ch32v20x.c b/EVT/EXAM/APPLICATION/WS2812_LED/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/BKP/BKP/User/ch32v20x_it.c b/EVT/EXAM/BKP/BKP/User/ch32v20x_it.c
@@ -38,6 +38,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+    NVIC_SystemReset();
     while(1)
     {
     }

diff --git a/EVT/EXAM/BKP/BKP/User/system_ch32v20x.c b/EVT/EXAM/BKP/BKP/User/system_ch32v20x.c
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }

diff --git a/EVT/EXAM/BLE/BLE_UART/APP/ch32v20x_it.c b/EVT/EXAM/BLE/BLE_UART/APP/ch32v20x_it.c
@@ -43,6 +43,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+    NVIC_SystemReset();
     while(1)
     {
     }
-Original file line number
+Diff line change
@@ Expand Up / @@ -38,6 +38,7 @@ void NMI_Handler(void) @@
      */
     void HardFault_Handler(void)
     {
+      NVIC_SystemReset();
       while (1)
       {
       }
@@ Expand Down @@