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Add constraints for topdown l2 architectures
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Topdown l2 architectures use fewer counters than icelake with just l1
counters. This leads to different grouping issues, so add specific
constraints for those architectures.
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captain5050 committed Jan 4, 2024
1 parent 934ac2b commit ea0c9e2
Showing 1 changed file with 17 additions and 4 deletions.
21 changes: 17 additions & 4 deletions scripts/create_perf_json.py
Original file line number Diff line number Diff line change
Expand Up @@ -1365,6 +1365,18 @@ def append_to_desc(s: str):
'tma_split_stores': nmi,
'tma_store_fwd_blk': nmi,
}
# Alderlake/sapphirerapids add topdown l2 events
# meaning fewer events and triggering NMI issues.
alderlake_constraints = {
# Metrics with more events than counters.
'tma_info_system_mem_read_latency': no_group,
'tma_info_system_mem_request_latency': no_group,
# Metrics that would fit were the NMI watchdog disabled.
'tma_ports_utilized_2': nmi,
'tma_ports_utilized_3m': nmi,
'tma_memory_fence': nmi,
'tma_slow_pause': nmi,
}
errata_constraints = {
# 4 programmable, 3 fixed counters per HT
'JKT': sandybridge_constraints,
Expand All @@ -1391,10 +1403,11 @@ def append_to_desc(s: str):
'ICX': icelake_constraints,
'RKL': icelake_constraints,
'TGL': icelake_constraints,
'ADL': icelake_constraints,
'ADLN': icelake_constraints,
'RPL': icelake_constraints,
'SPR': icelake_constraints,
# As above but l2 topdown counters
'ADL': alderlake_constraints,
'ADLN': alderlake_constraints,
'RPL': alderlake_constraints,
'SPR': alderlake_constraints,
}
if name in errata_constraints[self.shortname]:
j['MetricConstraint'] = errata_constraints[self.shortname][name]
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