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x64: Improve lowering for conditional traps #9575

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Nov 6, 2024
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x64: Improve lowering for conditional traps #9575

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15 changes: 11 additions & 4 deletions cranelift/codegen/src/isa/x64/lower.isle
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Expand Up @@ -1864,13 +1864,20 @@
(side_effect (x64_ud2 code)))

;;;; Rules for `trapz` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower (trapz val code))
(side_effect (trap_if_val (ZeroCond.Zero) val code)))

(rule 0 (lower (trapz val code))
(side_effect (trap_if_val (ZeroCond.Zero) val code)))

(rule 1 (lower (trapz (icmp cc a b) code))
(side_effect (trap_if_icmp (emit_cmp (intcc_complement cc) a b) code)))

;;;; Rules for `trapnz` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

(rule (lower (trapnz val code))
(side_effect (trap_if_val (ZeroCond.NonZero) val code)))
(rule 0 (lower (trapnz val code))
(side_effect (trap_if_val (ZeroCond.NonZero) val code)))

(rule 1 (lower (trapnz (icmp cc a b) code))
(side_effect (trap_if_icmp (emit_cmp cc a b) code)))

;;;; Rules for `uadd_overflow_trap` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

Expand Down
67 changes: 63 additions & 4 deletions cranelift/filetests/filetests/isa/x64/traps.clif
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Expand Up @@ -63,7 +63,7 @@ block0(v0: i64):
; movq %rbp, %rsp
; popq %rbp
; ret
;
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
Expand Down Expand Up @@ -92,7 +92,7 @@ block0(v0: i128):
; movq %rbp, %rsp
; popq %rbp
; ret
;
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
Expand Down Expand Up @@ -121,7 +121,7 @@ block0(v0: i64):
; movq %rbp, %rsp
; popq %rbp
; ret
;
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
Expand Down Expand Up @@ -150,7 +150,7 @@ block0(v0: i128):
; movq %rbp, %rsp
; popq %rbp
; ret
;
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
Expand All @@ -163,3 +163,62 @@ block0(v0: i128):
; popq %rbp
; retq
; ud2 ; trap: user1

function %trapz_icmp(i64, i64) {
block0(v0: i64, v1: i64):
v2 = icmp eq v0, v1
trapz v2, user1
return
}

; VCode:
; pushq %rbp
; movq %rsp, %rbp
; block0:
; cmpq %rsi, %rdi
; jnz #trap=user1
; movq %rbp, %rsp
; popq %rbp
; ret
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
; movq %rsp, %rbp
; block1: ; offset 0x4
; cmpq %rsi, %rdi
; jne 0x12
; movq %rbp, %rsp
; popq %rbp
; retq
; ud2 ; trap: user1

function %trapnz_icmp(i64, i64) {
block0(v0: i64, v1: i64):
v2 = icmp eq v0, v1
trapnz v2, user1
return
}

; VCode:
; pushq %rbp
; movq %rsp, %rbp
; block0:
; cmpq %rsi, %rdi
; jz #trap=user1
; movq %rbp, %rsp
; popq %rbp
; ret
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
; movq %rsp, %rbp
; block1: ; offset 0x4
; cmpq %rsi, %rdi
; je 0x12
; movq %rbp, %rsp
; popq %rbp
; retq
; ud2 ; trap: user1

4 changes: 2 additions & 2 deletions tests/disas/epoch-interruption-x86.wat
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Expand Up @@ -28,12 +28,12 @@
;; jae 0x64
;; jmp 0x46
;; 57: movq %r13, %rdi
;; callq 0xf3
;; callq 0xec
;; jmp 0x46
;; 64: movq 0x10(%r12), %rax
;; cmpq %rax, %rdi
;; jb 0x46
;; 72: movq %r13, %rdi
;; callq 0xf3
;; callq 0xec
;; jmp 0x46
;; 7f: ud2
36 changes: 16 additions & 20 deletions ...ad-store/x64/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat
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Expand Up @@ -21,33 +21,29 @@
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 0x68(%rdi), %r9
;; movl %edx, %r11d
;; subq $4, %r9
;; cmpq %r9, %r11
;; seta %sil
;; testb %sil, %sil
;; jne 0x2c
;; 1f: movq 0x60(%rdi), %rax
;; movl %ecx, (%rax, %r11)
;; movq 0x68(%rdi), %r8
;; movl %edx, %r10d
;; subq $4, %r8
;; cmpq %r8, %r10
;; ja 0x25
;; 18: movq 0x60(%rdi), %rsi
;; movl %ecx, (%rsi, %r10)
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 2c: ud2
;; 25: ud2
;;
;; wasm[0]::function[1]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 0x68(%rdi), %r9
;; movl %edx, %r11d
;; subq $4, %r9
;; cmpq %r9, %r11
;; seta %sil
;; testb %sil, %sil
;; jne 0x6c
;; 5f: movq 0x60(%rdi), %rax
;; movl (%rax, %r11), %eax
;; movq 0x68(%rdi), %r8
;; movl %edx, %r10d
;; subq $4, %r8
;; cmpq %r8, %r10
;; ja 0x65
;; 58: movq 0x60(%rdi), %rsi
;; movl (%rsi, %r10), %eax
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 6c: ud2
;; 65: ud2
36 changes: 16 additions & 20 deletions ...ore/x64/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat
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Original file line number Diff line number Diff line change
Expand Up @@ -21,33 +21,29 @@
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 0x68(%rdi), %r9
;; movl %edx, %r11d
;; subq $0x1004, %r9
;; cmpq %r9, %r11
;; seta %sil
;; testb %sil, %sil
;; jne 0x33
;; 22: movq 0x60(%rdi), %rax
;; movl %ecx, 0x1000(%rax, %r11)
;; movq 0x68(%rdi), %r8
;; movl %edx, %r10d
;; subq $0x1004, %r8
;; cmpq %r8, %r10
;; ja 0x2c
;; 1b: movq 0x60(%rdi), %rsi
;; movl %ecx, 0x1000(%rsi, %r10)
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 33: ud2
;; 2c: ud2
;;
;; wasm[0]::function[1]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 0x68(%rdi), %r9
;; movl %edx, %r11d
;; subq $0x1004, %r9
;; cmpq %r9, %r11
;; seta %sil
;; testb %sil, %sil
;; jne 0x73
;; 62: movq 0x60(%rdi), %rax
;; movl 0x1000(%rax, %r11), %eax
;; movq 0x68(%rdi), %r8
;; movl %edx, %r10d
;; subq $0x1004, %r8
;; cmpq %r8, %r10
;; ja 0x6c
;; 5b: movq 0x60(%rdi), %rsi
;; movl 0x1000(%rsi, %r10), %eax
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 73: ud2
;; 6c: ud2
50 changes: 22 additions & 28 deletions ...x64/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat
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Original file line number Diff line number Diff line change
Expand Up @@ -22,42 +22,36 @@
;; pushq %rbp
;; movq %rsp, %rbp
;; movl %edx, %r8d
;; movq %r8, %r11
;; addq 0x2f(%rip), %r11
;; jb 0x39
;; 17: cmpq 0x68(%rdi), %r11
;; seta %al
;; testb %al, %al
;; jne 0x3b
;; 27: addq 0x60(%rdi), %r8
;; movl $0xffff0000, %edx
;; movl %ecx, (%r8, %rdx)
;; movq %r8, %r10
;; addq 0x27(%rip), %r10
;; jb 0x33
;; 17: cmpq 0x68(%rdi), %r10
;; ja 0x35
;; 21: addq 0x60(%rdi), %r8
;; movl $0xffff0000, %edi
;; movl %ecx, (%r8, %rdi)
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 39: ud2
;; 3b: ud2
;; 3d: addb %al, (%rax)
;; 3f: addb %al, (%rax, %rax)
;; 33: ud2
;; 35: ud2
;; 37: addb %al, (%rax, %rax)
;;
;; wasm[0]::function[1]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movl %edx, %r8d
;; movq %r8, %r11
;; addq 0x2f(%rip), %r11
;; jb 0x99
;; 77: cmpq 0x68(%rdi), %r11
;; seta %al
;; testb %al, %al
;; jne 0x9b
;; 87: addq 0x60(%rdi), %r8
;; movl $0xffff0000, %ecx
;; movl (%r8, %rcx), %eax
;; movq %r8, %r10
;; addq 0x27(%rip), %r10
;; jb 0x73
;; 57: cmpq 0x68(%rdi), %r10
;; ja 0x75
;; 61: addq 0x60(%rdi), %r8
;; movl $0xffff0000, %edi
;; movl (%r8, %rdi), %eax
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 99: ud2
;; 9b: ud2
;; 9d: addb %al, (%rax)
;; 9f: addb %al, (%rax, %rax)
;; 73: ud2
;; 75: ud2
;; 77: addb %al, (%rax, %rax)
28 changes: 12 additions & 16 deletions ...oad-store/x64/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat
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Expand Up @@ -21,29 +21,25 @@
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movl %edx, %r9d
;; cmpq 0x68(%rdi), %r9
;; setae %r10b
;; testb %r10b, %r10b
;; jne 0x25
;; 18: movq 0x60(%rdi), %rsi
;; movb %cl, (%rsi, %r9)
;; movl %edx, %r8d
;; cmpq 0x68(%rdi), %r8
;; jae 0x1e
;; 11: movq 0x60(%rdi), %r10
;; movb %cl, (%r10, %r8)
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 25: ud2
;; 1e: ud2
;;
;; wasm[0]::function[1]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movl %edx, %r9d
;; cmpq 0x68(%rdi), %r9
;; setae %r10b
;; testb %r10b, %r10b
;; jne 0x66
;; 58: movq 0x60(%rdi), %rsi
;; movzbq (%rsi, %r9), %rax
;; movl %edx, %r8d
;; cmpq 0x68(%rdi), %r8
;; jae 0x3f
;; 31: movq 0x60(%rdi), %r10
;; movzbq (%r10, %r8), %rax
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 66: ud2
;; 3f: ud2
36 changes: 16 additions & 20 deletions ...tore/x64/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat
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Original file line number Diff line number Diff line change
Expand Up @@ -21,33 +21,29 @@
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 0x68(%rdi), %r9
;; movl %edx, %r11d
;; subq $0x1001, %r9
;; cmpq %r9, %r11
;; seta %sil
;; testb %sil, %sil
;; jne 0x33
;; 22: movq 0x60(%rdi), %rax
;; movb %cl, 0x1000(%rax, %r11)
;; movq 0x68(%rdi), %r8
;; movl %edx, %r10d
;; subq $0x1001, %r8
;; cmpq %r8, %r10
;; ja 0x2c
;; 1b: movq 0x60(%rdi), %rsi
;; movb %cl, 0x1000(%rsi, %r10)
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 33: ud2
;; 2c: ud2
;;
;; wasm[0]::function[1]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 0x68(%rdi), %r9
;; movl %edx, %r11d
;; subq $0x1001, %r9
;; cmpq %r9, %r11
;; seta %sil
;; testb %sil, %sil
;; jne 0x74
;; 62: movq 0x60(%rdi), %rax
;; movzbq 0x1000(%rax, %r11), %rax
;; movq 0x68(%rdi), %r8
;; movl %edx, %r10d
;; subq $0x1001, %r8
;; cmpq %r8, %r10
;; ja 0x6d
;; 5b: movq 0x60(%rdi), %rsi
;; movzbq 0x1000(%rsi, %r10), %rax
;; movq %rbp, %rsp
;; popq %rbp
;; retq
;; 74: ud2
;; 6d: ud2
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