arm64: Comment out some ID registers

Older toolchains don't support reading these registers. Until a fix is added comment them out. Reported by: jhb Sponsored by: Arm Ltd (cherry picked from commit f12952e)
bsdjhb · Sep 7, 2023 · bc13631 · bc13631
1 parent 93a9563
commit bc13631
Showing 1 changed file with 20 additions and 0 deletions.
diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
@@ -139,11 +139,15 @@ struct cpu_desc {
 	uint64_t	id_aa64mmfr0;
 	uint64_t	id_aa64mmfr1;
 	uint64_t	id_aa64mmfr2;
+#ifdef NOTYET
 	uint64_t	id_aa64mmfr3;
 	uint64_t	id_aa64mmfr4;
+#endif
 	uint64_t	id_aa64pfr0;
 	uint64_t	id_aa64pfr1;
+#ifdef NOTYET
 	uint64_t	id_aa64pfr2;
+#endif
 	uint64_t	id_aa64zfr0;
 	uint64_t	ctr;
 #ifdef COMPAT_FREEBSD32
@@ -1275,6 +1279,7 @@ static const struct mrs_field id_aa64mmfr2_fields[] = {
 };
 
 
+#ifdef NOTYET
 /* ID_AA64MMFR2_EL1 */
 static const struct mrs_field_value id_aa64mmfr3_spec_fpacc[] = {
 	MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR3, Spec_FPACC, NONE, IMPL),
@@ -1310,6 +1315,7 @@ static const struct mrs_field id_aa64mmfr3_fields[] = {
 static const struct mrs_field id_aa64mmfr4_fields[] = {
 	MRS_FIELD_END,
 };
+#endif
 
 
 /* ID_AA64PFR0_EL1 */
@@ -1561,10 +1567,12 @@ static const struct mrs_field id_aa64pfr1_fields[] = {
 };
 
 
+#ifdef NOTYET
 /* ID_AA64PFR2_EL1 */
 static const struct mrs_field id_aa64pfr2_fields[] = {
 	MRS_FIELD_END,
 };
+#endif
 
 
 /* ID_AA64ZFR0_EL1 */
@@ -1864,12 +1872,16 @@ static const struct mrs_user_reg user_regs[] = {
 	USER_REG(ID_AA64MMFR0_EL1, id_aa64mmfr0),
 	USER_REG(ID_AA64MMFR1_EL1, id_aa64mmfr1),
 	USER_REG(ID_AA64MMFR2_EL1, id_aa64mmfr2),
+#ifdef NOTYET
 	USER_REG(ID_AA64MMFR3_EL1, id_aa64mmfr3),
 	USER_REG(ID_AA64MMFR4_EL1, id_aa64mmfr4),
+#endif
 
 	USER_REG(ID_AA64PFR0_EL1, id_aa64pfr0),
 	USER_REG(ID_AA64PFR1_EL1, id_aa64pfr1),
+#ifdef NOTYET
 	USER_REG(ID_AA64PFR2_EL1, id_aa64pfr2),
+#endif
 
 	USER_REG(ID_AA64ZFR0_EL1, id_aa64zfr0),
 
@@ -2578,10 +2590,12 @@ print_cpu_features(u_int cpu, struct cpu_desc *desc,
 		print_id_register(sb, "Processor Features 1",
 		    desc->id_aa64pfr1, id_aa64pfr1_fields);
 
+#ifdef NOTYET
 	/* AArch64 Processor Feature Register 2 */
 	if (SHOULD_PRINT_REG(id_aa64pfr2))
 		print_id_register(sb, "Processor Features 2",
 		    desc->id_aa64pfr2, id_aa64pfr2_fields);
+#endif
 
 	/* AArch64 Memory Model Feature Register 0 */
 	if (SHOULD_PRINT_REG(id_aa64mmfr0))
@@ -2598,6 +2612,7 @@ print_cpu_features(u_int cpu, struct cpu_desc *desc,
 		print_id_register(sb, "Memory Model Features 2",
 		    desc->id_aa64mmfr2, id_aa64mmfr2_fields);
 
+#ifdef NOTYET
 	/* AArch64 Memory Model Feature Register 3 */
 	if (SHOULD_PRINT_REG(id_aa64mmfr3))
 		print_id_register(sb, "Memory Model Features 3",
@@ -2607,6 +2622,7 @@ print_cpu_features(u_int cpu, struct cpu_desc *desc,
 	if (SHOULD_PRINT_REG(id_aa64mmfr4))
 		print_id_register(sb, "Memory Model Features 4",
 		    desc->id_aa64mmfr4, id_aa64mmfr4_fields);
+#endif
 
 	/* AArch64 Debug Feature Register 0 */
 	if (SHOULD_PRINT_REG(id_aa64dfr0))
@@ -2722,11 +2738,15 @@ identify_cpu(u_int cpu)
 	desc->id_aa64mmfr0 = READ_SPECIALREG(id_aa64mmfr0_el1);
 	desc->id_aa64mmfr1 = READ_SPECIALREG(id_aa64mmfr1_el1);
 	desc->id_aa64mmfr2 = READ_SPECIALREG(id_aa64mmfr2_el1);
+#ifdef NOTYET
 	desc->id_aa64mmfr3 = READ_SPECIALREG(id_aa64mmfr3_el1);
 	desc->id_aa64mmfr4 = READ_SPECIALREG(id_aa64mmfr4_el1);
+#endif
 	desc->id_aa64pfr0 = READ_SPECIALREG(id_aa64pfr0_el1);
 	desc->id_aa64pfr1 = READ_SPECIALREG(id_aa64pfr1_el1);
+#ifdef NOTYET
 	desc->id_aa64pfr2 = READ_SPECIALREG(id_aa64pfr2_el1);
+#endif
 
 	/*
 	 * ID_AA64ZFR0_EL1 is only valid when at least one of: