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stm32h5: Replace DBGMCU base address for CPU access
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* BMD uses AP1 the AHB-AP and views the SoC address space like processor
* 0xe0044000 is correct for AP0 the Debug APB but BMD doesn't use it
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ALTracer committed Aug 15, 2024
1 parent 3d71884 commit e9add75
Showing 1 changed file with 5 additions and 1 deletion.
6 changes: 5 additions & 1 deletion src/target/stm32h5.c
Original file line number Diff line number Diff line change
Expand Up @@ -98,7 +98,11 @@
#define STM32H5_FLASH_BANK_MASK 0x80000000U
#define STM32H5_FLASH_SECTOR_COUNT_MASK 0x000000ffU

#define STM32H5_DBGMCU_BASE 0xe0044000
/*
* Both on H56x and H503 DBGMCU is visible via AP0 on Debug APB at 0xe0044000,
* and via AP1 by the processor at 0x44024000 alias.
*/
#define STM32H5_DBGMCU_BASE 0x44024000
#define STM32H5_DBGMCU_IDCODE (STM32H5_DBGMCU_BASE + 0x00U)
#define STM32H5_DBGMCU_CONFIG (STM32H5_DBGMCU_BASE + 0x04U)
#define STM32H5_DBGMCU_APB1LFREEZE (STM32H5_DBGMCU_BASE + 0x08U)
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