misc: remove parantheses for operator precedence

always set ADVERTISE_NOACKMODE (0 or 1)

src/Makefile

@@ -22,7 +22,7 @@ CFLAGS += -Wmaybe-uninitialized -Wstringop-overflow -Wunsafe-loop-optimizations
 endif
 
 ifeq ($(PROBE_HOST),hosted)
-ENABLE_DEBUG = 1
+ENABLE_DEBUG := 1
 endif
 
 ifeq ($(ENABLE_DEBUG), 1)
@@ -150,6 +150,8 @@ endif
 
 ifeq ($(ADVERTISE_NOACKMODE), 1)
 CFLAGS += -DADVERTISE_NOACKMODE=1
+else
+CFLAGS += -DADVERTISE_NOACKMODE=0
 endif
 
 OBJ = $(patsubst %.S,%.o,$(patsubst %.c,%.o,$(SRC)))

src/gdb_main.c

@@ -41,7 +41,7 @@
 #include "rtt.h"
 #endif
 
-#if defined(ADVERTISE_NOACKMODE) && ADVERTISE_NOACKMODE == 1
+#if ADVERTISE_NOACKMODE == 1
 /*
  * This lets GDB know that the probe supports ‘QStartNoAckMode’
  * and prefers to operate in no-acknowledgment mode

src/platforms/common/usb_serial.c

@@ -77,7 +77,7 @@ static void debug_serial_receive_callback(usbd_device *dev, uint8_t ep);
 static bool debug_serial_send_complete = true;
 #endif
 
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
 /*
  * This call initialises "SemiHosting", only we then do our own SVC interrupt things to
  * route all output through to the debug USB serial interface if debug_bmp is true.
@@ -214,7 +214,7 @@ void usb_serial_set_config(usbd_device *dev, uint16_t value)
  usb_serial_set_state(dev, GDB_IF_NO, CDCACM_GDB_ENDPOINT + 1U);
  usb_serial_set_state(dev, UART_IF_NO, CDCACM_UART_ENDPOINT + 1U);
 
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
  initialise_monitor_handles();
 #endif
 }
@@ -249,7 +249,7 @@ uint32_t debug_serial_fifo_send(const char *const fifo, const uint32_t fifo_begi
  return fifo_begin;
 }
 
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
 static bool debug_serial_fifo_buffer_empty(void)
 {
  return debug_serial_debug_write_index == debug_serial_debug_read_index;
@@ -270,17 +270,17 @@ static void debug_serial_send_data(void)
  * If fifo empty, nothing further to do. */
  if (usb_get_config() != 1 ||
  (aux_serial_receive_buffer_empty()
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
  && debug_serial_fifo_buffer_empty()
 #endif
  )) {
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
  debug_serial_debug_read_index = debug_serial_debug_write_index;
 #endif
  aux_serial_drain_receive_buffer();
  debug_serial_send_complete = true;
  } else {
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
  debug_serial_debug_read_index = debug_serial_fifo_send(
  debug_serial_debug_buffer, debug_serial_debug_read_index, debug_serial_debug_write_index);
 #endif

src/remote.c

@@ -317,7 +317,7 @@ static void remote_packet_process_general(char *packet, const size_t packet_len)
 #endif
  break;
  case REMOTE_START:
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
  debug_bmp = true;
 #endif
  remote_respond_string(REMOTE_RESP_OK, PLATFORM_IDENT "" FIRMWARE_VERSION);

src/target/adiv5.c

@@ -476,7 +476,7 @@ static uint32_t cortexm_initial_halt(adiv5_access_port_s *ap)
  */
 static bool cortexm_prepare(adiv5_access_port_s *ap)
 {
-#if (defined(PC_HOSTED) && PC_HOSTED == 1) || (ENABLE_DEBUG == 1)
+#if (defined(PC_HOSTED) && PC_HOSTED == 1) || ENABLE_DEBUG == 1
  uint32_t start_time = platform_time_ms();
 #endif
  uint32_t dhcsr = cortexm_initial_halt(ap);
@@ -608,7 +608,7 @@ static void adiv5_component_probe(
  }
  }
 
-#if (ENABLE_DEBUG == 1) && defined(PLATFORM_HAS_DEBUG)
+#if ENABLE_DEBUG == 1 && defined(PLATFORM_HAS_DEBUG)
  /* Check SYSMEM bit */
  const uint32_t memtype = adiv5_mem_read32(ap, addr | ADIV5_ROM_MEMTYPE) & ADIV5_ROM_MEMTYPE_SYSMEM;
 

src/target/imxrt.c

@@ -218,7 +218,7 @@ bool imxrt_probe(target_s *const target)
  snprintf(priv->name, IMXRT_NAME_MAX_LENGTH, "i.MXRT%u", priv->chip_id);
  target->driver = priv->name;
 
-#if (ENABLE_DEBUG == 1) && (PC_HOSTED == 1 || defined(ESP_LOGD))
+#if ENABLE_DEBUG == 1 && (PC_HOSTED == 1 || defined(ESP_LOGD))
  const uint8_t boot_mode = (target_mem_read32(target, IMXRT_SRC_BOOT_MODE2) >> 24U) & 3U;
 #endif
  DEBUG_TARGET("i.MXRT boot mode is %x\n", boot_mode);
@@ -521,7 +521,7 @@ static void imxrt_spi_wait_complete(target_s *const target)
  target_mem_write32(target, IMXRT_FLEXSPI1_INT(priv), IMXRT_FLEXSPI1_INT_PRG_CMD_DONE);
  /* Check if any errors occured */
  if (target_mem_read32(target, IMXRT_FLEXSPI1_INT(priv)) & IMXRT_FLEXSPI1_INT_CMD_ERR) {
-#if (ENABLE_DEBUG == 1) && PC_HOSTED == 1
+#if ENABLE_DEBUG == 1 && PC_HOSTED == 1
  /* Read out the status code and display it */
  const uint32_t status = target_mem_read32(target, IMXRT_FLEXSPI1_STAT1(priv));
  DEBUG_TARGET("Error executing sequence, offset %u, error code %u\n", (uint8_t)(status >> 16U) & 0xfU,