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HammerBlade DMA #828

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1 change: 1 addition & 0 deletions examples/.gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -28,3 +28,4 @@ dramsim3.txt
*.d
*.dis
*.diso
lfs.c
51 changes: 51 additions & 0 deletions examples/spmd/icache_miss_bombing/Makefile
Original file line number Diff line number Diff line change
@@ -0,0 +1,51 @@
# Copyright (c) 2021, University of Washington All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# Redistributions of source code must retain the above copyright notice, this list
# of conditions and the following disclaimer.
#
# Redistributions in binary form must reproduce the above copyright notice, this
# list of conditions and the following disclaimer in the documentation and/or
# other materials provided with the distribution.
#
# Neither the name of the copyright holder nor the names of its contributors may
# be used to endorse or promote products derived from this software without
# specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

# This Makefile compiles, links, and executes examples Run `make help`
# to see the available targets for the selected platform.

################################################################################
# environment.mk verifies the build environment and sets the following
# makefile variables:
#
# LIBRAIRES_PATH: The path to the libraries directory
# HARDWARE_PATH: The path to the hardware directory
# EXAMPLES_PATH: The path to the examples directory
# BASEJUMP_STL_DIR: Path to a clone of BaseJump STL
# BSG_MANYCORE_DIR: Path to a clone of BSG Manycore
###############################################################################

REPLICANT_PATH:=$(shell git rev-parse --show-toplevel)

# Name of the SPMD test. In this case, the name of the directory
SPMD_NAME := $(notdir $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))

include $(REPLICANT_PATH)/environment.mk

SPMD_SRC_PATH = $(BSG_MANYCORE_DIR)/software/spmd

include $(EXAMPLES_PATH)/spmd/loader.mk
1 change: 1 addition & 0 deletions hardware/hardware.mk
Original file line number Diff line number Diff line change
Expand Up @@ -175,6 +175,7 @@ $(BSG_MACHINE_PATH)/bsg_bladerunner_configuration.rom: $(BSG_MACHINE_PATH)/Makef
@echo $(call dec2bin,$(BSG_MACHINE_IO_EP_CREDITS)) >> [email protected]
@echo $(call dec2bin,0) >> [email protected]
@echo $(call hex2bin,$(CHIP_ID)) >> [email protected]
@echo $(call dec2bin,$(BSG_MACHINE_HOST_TYPE)) >> [email protected]
@cat $(BSG_MACHINE_PATH)/bsg_bladerunner_memsys.rom >> [email protected]
mv [email protected] $@

Expand Down
3 changes: 2 additions & 1 deletion libraries/.gitignore
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
*.o
*.so
*.so.1
*.so.1.0
*.so.1.0
*.a
5 changes: 5 additions & 0 deletions libraries/bsg_manycore_config.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -193,6 +193,11 @@ int hb_mc_config_init(const hb_mc_config_raw_t raw[HB_MC_CONFIG_MAX],
CHECK_FIELD(HB_MC_CONFIG_IO_HOST_CREDITS_CAP, idx >= HB_MC_HOST_CREDITS_MIN && idx <= HB_MC_HOST_CREDITS_MAX);
config->io_host_credits_cap = idx;

// Host type
idx = raw[HB_MC_CONFIG_HOST_TYPE];
CHECK_FIELD(HB_MC_CONFIG_HOST_TYPE, idx >= HB_MC_HOST_TYPE_PC && idx <= HB_MC_HOST_TYPE_BLACKPARROT);
config->host_type = idx;

err = hb_mc_memsys_init(&raw[HB_MC_CONFIG_MEMSYS], &config->memsys);
if (err != HB_MC_SUCCESS) {
bsg_pr_err("%s: Failed to initialize memory system: %s\n",
Expand Down
8 changes: 7 additions & 1 deletion libraries/bsg_manycore_config.h
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,10 @@ extern "C" {
#define HB_MC_HOST_CREDITS_MIN 1
#define HB_MC_HOST_CREDITS_MAX 32

// PC is off-die x86/ARM, BlackParrot is on-die host
#define HB_MC_HOST_TYPE_PC 0
#define HB_MC_HOST_TYPE_BLACKPARROT 1

typedef hb_mc_rom_word_t hb_mc_config_raw_t;

/* Compilation Metadata */
Expand Down Expand Up @@ -108,6 +112,7 @@ extern "C" {
uint32_t io_host_credits_cap;
uint32_t io_endpoint_max_out_credits;
uint32_t chip_id;
uint32_t host_type;
hb_mc_memsys_t memsys;
} hb_mc_config_t;

Expand Down Expand Up @@ -142,7 +147,8 @@ extern "C" {
HB_MC_CONFIG_IO_HOST_CREDITS_CAP = 26,
HB_MC_CONFIG_IO_EP_MAX_OUT_CREDITS = 27,
HB_MC_CONFIG_CHIP_ID = 28,
HB_MC_CONFIG_MEMSYS = 29,
HB_MC_CONFIG_HOST_TYPE = 29,
HB_MC_CONFIG_MEMSYS = 30,
HB_MC_CONFIG_MAX=HB_MC_CONFIG_MEMSYS + HB_MC_MEMSYS_ROM_IDX_MAX,
} hb_mc_config_id_t;

Expand Down
36 changes: 21 additions & 15 deletions libraries/bsg_manycore_cuda.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2105,12 +2105,14 @@ int hb_mc_device_pod_dma_to_device(hb_mc_device_t *device, hb_mc_pod_id_t pod_id
hb_mc_pod_t *pod = &device->pods[pod_id];

// flush cache
err = hb_mc_manycore_pod_flush_vcache(device->mc, pod->pod_coord);
if (err != HB_MC_SUCCESS) {
bsg_pr_err("%s: failed to flush victim cache: %s\n",
__func__,
hb_mc_strerror(err));
return err;
if (device->mc->config.host_type == HB_MC_HOST_TYPE_PC) {
err = hb_mc_manycore_pod_flush_vcache(device->mc, pod->pod_coord);
if (err != HB_MC_SUCCESS) {
bsg_pr_err("%s: failed to flush victim cache: %s\n",
__func__,
hb_mc_strerror(err));
return err;
}
}

// for each job...
Expand All @@ -2136,9 +2138,11 @@ int hb_mc_device_pod_dma_to_device(hb_mc_device_t *device, hb_mc_pod_id_t pod_id
}

// invalidate cache
err = hb_mc_manycore_pod_invalidate_vcache(device->mc, pod->pod_coord);
if (err != HB_MC_SUCCESS) {
return err;
if (device->mc->config.host_type == HB_MC_HOST_TYPE_PC) {
err = hb_mc_manycore_pod_invalidate_vcache(device->mc, pod->pod_coord);
if (err != HB_MC_SUCCESS) {
return err;
}
}

return HB_MC_SUCCESS;
Expand All @@ -2155,12 +2159,14 @@ int hb_mc_device_pod_dma_to_host(hb_mc_device_t *device, hb_mc_pod_id_t pod_id,

// flush cache
hb_mc_pod_t *pod = &device->pods[pod_id];
err = hb_mc_manycore_pod_flush_vcache(device->mc, pod->pod_coord);
if (err != HB_MC_SUCCESS) {
bsg_pr_err("%s: failed to flush victim cache: %s\n",
__func__,
hb_mc_strerror(err));
return err;
if (device->mc->config.host_type == 0) {
err = hb_mc_manycore_pod_flush_vcache(device->mc, pod->pod_coord);
if (err != HB_MC_SUCCESS) {
bsg_pr_err("%s: failed to flush victim cache: %s\n",
__func__,
hb_mc_strerror(err));
return err;
}
}

// for each job...
Expand Down
1 change: 1 addition & 0 deletions libraries/bsg_manycore_memsys.h
Original file line number Diff line number Diff line change
Expand Up @@ -63,6 +63,7 @@ typedef struct __hb_mc_memsys_t {
// memory system features
uint32_t feature_dma; //!< Can I do DMA?
uint32_t feature_cache; //!< Do I have DMA?
uint32_t dma2cache; //!< Does my DMA write directly to vcache
// dram address bitfields
hb_mc_dram_pa_bitfield dram_ro; //!< DRAM row bits info
hb_mc_dram_pa_bitfield dram_bg; //!< DRAM bankgroup bits info
Expand Down
2 changes: 1 addition & 1 deletion libraries/bsg_manycore_packet.h
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ extern "C" {
hb_mc_request_packet_t request; /**/
hb_mc_response_packet_t response; /* from the Hammerblade Manycore */
uint32_t words[4];
} __attribute__((aligned(4))) hb_mc_packet_t;
} __attribute__((aligned(8))) hb_mc_packet_t;

/**
* Fill a response packet fields using a request packet.
Expand Down
2 changes: 1 addition & 1 deletion libraries/bsg_manycore_request_packet.h
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,7 @@ extern "C" {
uint8_t op_v2; //!< opcode
uint32_t addr; //!< address field (EPA)
uint8_t reserved[2];
} __attribute__((packed, aligned(4))) hb_mc_request_packet_t;
} __attribute__((packed, aligned(8))) hb_mc_request_packet_t;

typedef struct hb_mc_request_packet_load_info {
uint32_t part_sel;
Expand Down
2 changes: 1 addition & 1 deletion libraries/bsg_manycore_response_packet.h
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,7 @@ extern "C" {
uint32_t data; //!< packet's payload data
uint8_t op; //!< opcode
uint8_t reserved[8];
} __attribute__((packed, aligned(4))) hb_mc_response_packet_t;
} __attribute__((packed, aligned(8))) hb_mc_response_packet_t;


/**
Expand Down
128 changes: 128 additions & 0 deletions libraries/features/dma/blackparrot/bsg_manycore_dma.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,128 @@
#include <bsg_manycore_dma.h>
#include <bsg_manycore.h>
#include <bsg_manycore_printing.h>
#include <bsg_manycore_platform.hpp>
#include <bsg_manycore_vcache.h>

/* these are convenience macros that are only good for one line prints */
#define dma_pr_dbg(mc, fmt, ...) \
bsg_pr_dbg("%s: " fmt, mc->name, ##__VA_ARGS__)

#define dma_pr_err(mc, fmt, ...) \
bsg_pr_err("%s: " fmt, mc->name, ##__VA_ARGS__)

#define dma_pr_warn(mc, fmt, ...) \
bsg_pr_warn("%s: " fmt, mc->name, ##__VA_ARGS__)

#define dma_pr_info(mc, fmt, ...) \
bsg_pr_info("%s: " fmt, mc->name, ##__VA_ARGS__)

int hb_mc_npa_to_bp_eva(hb_mc_manycore_t *mc,
const hb_mc_npa_t *npa,
uint64_t *bp_eva) {
const hb_mc_config_t *cfg = hb_mc_manycore_get_config(mc);
hb_mc_coordinate_t coord = hb_mc_npa_get_xy(npa);
hb_mc_coordinate_t npod = hb_mc_config_npod(cfg, coord);
unsigned long long npody2 = npod.y / 2; // We pack all vcache pods into 2
hb_mc_epa_t epa = hb_mc_npa_get_epa(npa);

uint64_t base_eva;
if (hb_mc_config_is_vanilla_core(cfg, coord)) {
*bp_eva = 0
| (3ULL << 38ULL)
| (coord.y << 25ULL)
| (coord.x << 18ULL)
| (epa << 0ULL);
} else if (hb_mc_config_is_dram(cfg, coord)) {
*bp_eva = 0
| (2ULL << 38ULL)
| (npody2 << 36ULL)
| (coord.x << 29ULL)
| (epa << 0ULL);
} else {
dma_pr_err(mc, "%s: DMA region not supported on this platform\n", __func__);
return HB_MC_NOIMPL;
}

return HB_MC_SUCCESS;
}

/**
* Write memory out to manycore DRAM via DMA
*
* NOTE: This method is declared with __attribute__((weak)) so that a
* platform can define write OR read in its own bsg_manycore_dma.cpp
* implementation, but does not need to declare both.
*
* @param[in] mc A manycore instance initialized with hb_mc_manycore_init()
* @param[in] npa A valid hb_mc_npa_t - must be an L2 cache coordinate
* @param[in] data A buffer to be written out manycore hardware
* @param[in] sz The number of bytes to write to manycore hardware
* @return HB_MC_FAIL if an error occured. HB_MC_SUCCESS otherwise.
*/
int hb_mc_dma_write(hb_mc_manycore_t *mc,
const hb_mc_npa_t *npa,
const void *data, size_t sz)
{
int rc;
bp_mc_link_t *mcl = reinterpret_cast<bp_mc_link_t *>(mc->platform);

uint64_t base_eva;
if ((rc = hb_mc_npa_to_bp_eva(mc, npa, &base_eva)) != HB_MC_SUCCESS) {
return rc;
}

int32_t *buf = (int32_t *) data;
for (int i = 0; i < sz; i+=4) {
uint64_t bp_eva = base_eva + i;
if ((rc = mcl->mmio_write(bp_eva, buf[i/4], 0xf)) != HB_MC_SUCCESS) {
return rc;
}
}

return HB_MC_SUCCESS;
}


/**
* Read memory from manycore DRAM via DMA
*
* NOTE: This method is declared with __attribute__((weak)) so that a
* platform can define write OR read in its own bsg_manycore_dma.cpp
* implementation, but does not need to declare both.
*
* @param[in] mc A manycore instance initialized with hb_mc_manycore_init()
* @param[in] npa A valid hb_mc_npa_t - must be an L2 cache coordinate
* @param[in] data A host buffer to be read into from manycore hardware
* @param[in] sz The number of bytes to read from manycore hardware
* @return HB_MC_FAIL if an error occured. HB_MC_SUCCESS otherwise.
*/
int hb_mc_dma_read(hb_mc_manycore_t *mc,
const hb_mc_npa_t *npa,
void *data, size_t sz)
{
int rc;
bp_mc_link_t *mcl = reinterpret_cast<bp_mc_link_t *>(mc->platform);

uint64_t base_eva;
if ((rc = hb_mc_npa_to_bp_eva(mc, npa, &base_eva)) != HB_MC_SUCCESS) {
return rc;
}

int32_t *buf = (int32_t *) data;
for (int i = 0; i < sz; i+=4) {
uint64_t bp_eva = base_eva + i;
if ((rc = mcl->mmio_read(bp_eva, &buf[i/4])) != HB_MC_SUCCESS) {
return rc;
}
}

return HB_MC_SUCCESS;
}

int hb_mc_dma_init(hb_mc_manycore_t *mc)
{
mc->config.memsys.dma2cache = 1;
return HB_MC_SUCCESS;
}

44 changes: 44 additions & 0 deletions libraries/features/dma/blackparrot/feature.mk
Original file line number Diff line number Diff line change
@@ -0,0 +1,44 @@
# Copyright (c) 2019, University of Washington All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# Redistributions of source code must retain the above copyright notice, this list
# of conditions and the following disclaimer.
#
# Redistributions in binary form must reproduce the above copyright notice, this
# list of conditions and the following disclaimer in the documentation and/or
# other materials provided with the distribution.
#
# Neither the name of the copyright holder nor the names of its contributors may
# be used to endorse or promote products derived from this software without
# specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

DMA_FEATURE_CXXSOURCES += $(LIBRARIES_PATH)/features/dma/blackparrot/bsg_manycore_dma.cpp

DMA_FEATURE_OBJECTS += $(patsubst %cpp,%o,$(DMA_FEATURE_CXXSOURCES))
DMA_FEATURE_OBJECTS += $(patsubst %c,%o,$(DMA_FEATURE_CSOURCES))

$(DMA_FEATURE_OBJECTS): INCLUDES := -I$(LIBRARIES_PATH)
$(DMA_FEATURE_OBJECTS): INCLUDES += -I$(LIBRARIES_PATH)/features/dma
$(DMA_FEATURE_OBJECTS): CFLAGS := -std=c11 -fPIC -D_GNU_SOURCE -D_BSD_SOURCE -D_DEFAULT_SOURCE $(INCLUDES)
$(DMA_FEATURE_OBJECTS): CXXFLAGS := -std=c++11 -fPIC -D_GNU_SOURCE -D_BSD_SOURCE -D_DEFAULT_SOURCE $(INCLUDES)

$(BSG_PLATFORM_PATH)/libbsg_manycore_runtime.so.1.0: $(DMA_FEATURE_OBJECTS)

.PHONY: dma_feature.clean
dma_feature.clean:
rm -f $(DMA_FEATURE_OBJECTS)

platform.clean: dma_feature.clean
4 changes: 2 additions & 2 deletions libraries/features/dma/noimpl/feature.mk
Original file line number Diff line number Diff line change
Expand Up @@ -35,8 +35,8 @@ DMA_FEATURE_OBJECTS += $(patsubst %c,%o,$(DMA_FEATURE_CSOURCES))

$(DMA_FEATURE_OBJECTS): INCLUDES := -I$(LIBRARIES_PATH)
$(DMA_FEATURE_OBJECTS): INCLUDES += -I$(LIBRARIES_PATH)/features/dma
$(DMA_FEATURE_OBJECTS): CFLAGS := -std=c11 -fPIC -D_GNU_SOURCE -D_DEFAULT_SOURCE $(INCLUDES)
$(DMA_FEATURE_OBJECTS): CXXFLAGS := -std=c++11 -fPIC -D_GNU_SOURCE -D_DEFAULT_SOURCE $(INCLUDES)
$(DMA_FEATURE_OBJECTS): CFLAGS := -std=c11 -fPIC -D_GNU_SOURCE -D_BSD_SOURCE -D_DEFAULT_SOURCE $(INCLUDES)
$(DMA_FEATURE_OBJECTS): CXXFLAGS := -std=c++11 -fPIC -D_GNU_SOURCE -D_BSD_SOURCE -D_DEFAULT_SOURCE $(INCLUDES)

$(BSG_PLATFORM_PATH)/libbsg_manycore_runtime.so.1.0: $(DMA_FEATURE_OBJECTS)

Expand Down
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