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Fix all clippy lints
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Also deny clippy warnings in CI
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jbeaurivage committed Jan 8, 2024
1 parent 4e7f8ef commit 50e9279
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Showing 16 changed files with 28 additions and 29 deletions.
10 changes: 1 addition & 9 deletions .github/workflows/build-hal.yml
Original file line number Diff line number Diff line change
Expand Up @@ -38,12 +38,4 @@ jobs:
set -ex
features=$(cat ./crates.json | jq -Mr --arg pac "${{matrix.pac}}" -c '.hal_build_variants["${{matrix.pac}}"].features | join(",")')
target=$(cat ./crates.json | jq -Mr --arg pac "${{matrix.pac}}" -c '.hal_build_variants["${{matrix.pac}}"].target')
cargo build --features=${features} --target=${target} --manifest-path=./hal/Cargo.toml
- name: Clippy HAL for ${{ matrix.pac }}
if: ${{ matrix.toolchain == 'nightly' }}
run: |
set -ex
features=$(cat ./crates.json | jq -Mr --arg pac "${{matrix.pac}}" -c '.hal_build_variants["${{matrix.pac}}"].features | join(",")')
target=$(cat ./crates.json | jq -Mr --arg pac "${{matrix.pac}}" -c '.hal_build_variants["${{matrix.pac}}"].target')
cargo clippy --features=${features} --target=${target} --manifest-path=./hal/Cargo.toml
cargo clippy --features=${features} --target=${target} --manifest-path=./hal/Cargo.toml -- -D warnings
2 changes: 2 additions & 0 deletions hal/src/gpio/dynpin.rs
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Expand Up @@ -57,6 +57,8 @@
//! operation, the trait functions will return
//! [`InvalidPinType`](Error::InvalidPinType).
#![allow(clippy::bool_comparison)]

use core::convert::TryFrom;

use paste::paste;
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1 change: 1 addition & 0 deletions hal/src/gpio/pin.rs
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Expand Up @@ -94,6 +94,7 @@
//! [`AnyKind`]: crate::typelevel#anykind-trait-pattern
#![allow(clippy::zero_prefixed_literal)]
#![allow(clippy::bool_comparison)]

use core::convert::Infallible;
use core::marker::PhantomData;
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1 change: 0 additions & 1 deletion hal/src/lib.rs
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Expand Up @@ -104,4 +104,3 @@ pub use crate::thumbv7em::*;

#[macro_use]
mod bsp_peripherals_macro;
pub use bsp_peripherals_macro::*;
2 changes: 1 addition & 1 deletion hal/src/rtc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -455,7 +455,7 @@ impl TimerParams {
* (rust-lang/rust#51999) */
};

let cycles: u32 = ticks / divider_value as u32;
let cycles: u32 = ticks / divider_value;

TimerParams { divider, cycles }
}
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6 changes: 6 additions & 0 deletions hal/src/sercom/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -721,6 +721,8 @@ where

/// Obtain a reference to the PAC `SERCOM` struct
///
/// # Safety
///
/// Directly accessing the `SERCOM` could break the invariants of the
/// type-level tracking in this module, so it is unsafe.
#[inline]
Expand Down Expand Up @@ -1241,6 +1243,8 @@ where

/// Read from the DATA register
///
/// # Safety
///
/// Reading from the data register directly is `unsafe`, because it will
/// clear the RXC flag, which could break assumptions made elsewhere in
/// this module.
Expand All @@ -1251,6 +1255,8 @@ where

/// Write to the DATA register
///
/// # Safety
///
/// Writing to the data register directly is `unsafe`, because it will clear
/// the DRE flag, which could break assumptions made elsewhere in this
/// module.
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4 changes: 4 additions & 0 deletions hal/src/sercom/spi_future.rs
Original file line number Diff line number Diff line change
Expand Up @@ -489,6 +489,8 @@ where
if self.rcvd < self.sent {
let buf = unsafe { buf.get_unchecked_mut(self.rcvd..) };
let mut data = buf.iter_mut();
// Allow this lint as it will put out a warning on thumbv7em but not thumbv6m
#[allow(clippy::unnecessary_cast)]
let word = unsafe { self.spi.as_mut().read_data() as u32 };
let bytes = word.to_le_bytes();
let mut iter = bytes.iter();
Expand Down Expand Up @@ -544,6 +546,8 @@ where
/// Consume the [`SpiFuture`] and free its components without checking for
/// completion
///
/// # Safety
///
/// Ending the transaction prematurely could leave the [`Spi`] in an
/// inconsistent state. It is not safe to call this function unless the
/// transaction is complete.
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2 changes: 1 addition & 1 deletion hal/src/sercom/uart/config.rs
Original file line number Diff line number Diff line change
Expand Up @@ -88,7 +88,7 @@ impl<P: ValidPads> Config<P> {

// Enable internal clock mode
registers.configure_mode();
registers.configure_pads(P::RXPO as u8, P::TXPO as u8);
registers.configure_pads(P::RXPO, P::TXPO);
registers.set_char_size(EightBit::SIZE);

Self {
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9 changes: 2 additions & 7 deletions hal/src/thumbv6m/usb/bus.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,9 @@ use usb_device::{Result as UsbResult, UsbDirection, UsbError};

/// EndpointTypeBits represents valid values for the EPTYPE fields in
/// the EPCFGn registers.
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
#[derive(Debug, Default, PartialEq, Eq, Clone, Copy)]
pub enum EndpointTypeBits {
#[default]
Disabled = 0,
Control = 1,
Isochronous = 2,
Expand All @@ -35,12 +36,6 @@ pub enum EndpointTypeBits {
DualBank = 5,
}

impl Default for EndpointTypeBits {
fn default() -> Self {
EndpointTypeBits::Disabled
}
}

impl From<EndpointType> for EndpointTypeBits {
fn from(ep_type: EndpointType) -> EndpointTypeBits {
match ep_type {
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2 changes: 1 addition & 1 deletion hal/src/thumbv7em/aes.rs
Original file line number Diff line number Diff line change
Expand Up @@ -304,7 +304,7 @@ impl Aes {
/// Enable-protected register
#[inline]
fn ctrla(&self) -> &CTRLA {
&(*self.aes()).ctrla
&self.aes().ctrla
}

/// Control B
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2 changes: 2 additions & 0 deletions hal/src/thumbv7em/clock/v2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -853,6 +853,8 @@
//!
//! [interior mutability]: https://doc.rust-lang.org/reference/interior-mutability.html
#![allow(clippy::manual_range_contains)]

use typenum::U0;

use crate::time::Hertz;
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2 changes: 2 additions & 0 deletions hal/src/thumbv7em/clock/v2/gclk.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1166,6 +1166,7 @@ where
/// factors to only the valid ones for the given [`Gclk`]. See the
/// [`GclkDivider`] trait for more details.
#[inline]
#[allow(clippy::should_implement_trait)]
pub fn div(mut self, div: G::Divider) -> Self {
self.settings.div = div;
self
Expand Down Expand Up @@ -1320,6 +1321,7 @@ impl<I: GclkSourceId> EnabledGclk0<I, U1> {
///
/// `Gclk0` will remain fully enabled during the swap.
#[inline]
#[allow(clippy::type_complexity)]
pub fn swap_pin_for_source<S>(
self,
source: S,
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2 changes: 1 addition & 1 deletion hal/src/thumbv7em/pukcc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -297,7 +297,7 @@ impl Pukcc {
let service_params = &mut pukcl_params.params.ZpEcDsaGenerateFast;
service_params.nu1ModBase = modulo_p.pukcc_base();
service_params.nu1CnsBase = cns.pukcc_base();
service_params.u2ModLength = C::MOD_LENGTH as u16;
service_params.u2ModLength = C::MOD_LENGTH;
service_params.nu1ScalarNumber = k_cr.pukcc_base();
service_params.nu1OrderPointBase = order_point.pukcc_base();
service_params.nu1PrivateKey = private_key_cr.pukcc_base();
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1 change: 1 addition & 0 deletions hal/src/thumbv7em/qspi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -244,6 +244,7 @@ impl Qspi<OneShot> {
/// Return the consumed pins and the QSPI peripheral
///
/// Order: `(qspi, sck, cs, io0, io1, io2, io3)`
#[allow(clippy::type_complexity)]
pub fn free(
self,
) -> (
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9 changes: 2 additions & 7 deletions hal/src/thumbv7em/usb/bus.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,9 @@ use usb_device::{Result as UsbResult, UsbDirection, UsbError};

/// EndpointTypeBits represents valid values for the EPTYPE fields in
/// the EPCFGn registers.
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
#[derive(Debug, Default, PartialEq, Eq, Clone, Copy)]
pub enum EndpointTypeBits {
#[default]
Disabled = 0,
Control = 1,
Isochronous = 2,
Expand All @@ -35,12 +36,6 @@ pub enum EndpointTypeBits {
DualBank = 5,
}

impl Default for EndpointTypeBits {
fn default() -> Self {
EndpointTypeBits::Disabled
}
}

impl From<EndpointType> for EndpointTypeBits {
fn from(ep_type: EndpointType) -> EndpointTypeBits {
match ep_type {
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2 changes: 1 addition & 1 deletion hal/src/timer_params.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ impl TimerParams {
_ => 1024,
};

let cycles: u32 = ticks / divider as u32;
let cycles: u32 = ticks / divider;

if cycles > u16::max_value() as u32 {
panic!("cycles {} is out of range for a 16 bit counter", cycles);
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