fix: Cleanup newly introduced nightly Clippy lints (#763)

atsamd-hal-macros/src/lib.rs

@@ -70,11 +70,11 @@ fn hal_cfg_impl(args: TokenStream) -> Result<Group, Error> {
 ///     "nvmctrl-d5x" => "calibration/d5x.rs",
 /// )]
 /// pub mod calibration {}
-
+///
 /// #[hal_module("aes")
 /// pub mod aes {}
 /// ```
-/// 
+///
 /// This will then expand to something of the form:
 /// ```ignore
 /// #[cfg(any(feature = "samd11c", ...))]
@@ -88,7 +88,7 @@ fn hal_cfg_impl(args: TokenStream) -> Result<Group, Error> {
 /// #[cfg(any(feature = "samd51g", ...))]
 /// pub mod aes;
 /// ```
-/// 
+///
 /// Ideally you would be to write `pub mod calibration;` instead of
 /// `pub mod calibration {}`, but unfortunately non-inline modules are not
 /// currently supposed in proc macros. See

hal/src/dmac/dma_controller.rs

@@ -158,15 +158,18 @@ impl DmaController {
 
         Self::swreset(&mut dmac);
 
-        // SAFETY this is safe because we write a whole u32 to 32-bit registers,
+        // SAFETY:
+        //
+        // This is safe because we write a whole u32 to 32-bit registers,
         // and the descriptor array addesses will never change since they are static.
         // We just need to ensure the writeback and descriptor_section addresses
         // are valid.
+        #[allow(static_mut_refs)]
         unsafe {
             dmac.baseaddr()
-                .write(|w| w.baseaddr().bits(DESCRIPTOR_SECTION.as_ptr() as u32));
+                .write(|w| w.baseaddr().bits(DESCRIPTOR_SECTION.as_mut_ptr() as u32));
             dmac.wrbaddr()
-                .write(|w| w.wrbaddr().bits(WRITEBACK.as_ptr() as u32));
+                .write(|w| w.wrbaddr().bits(WRITEBACK.as_mut_ptr() as u32));
         }
 
         // ----- Select priority levels ----- //

hal/src/dmac/transfer.rs

@@ -648,7 +648,7 @@ where
     }
 
     /// Modify a completed transfer with a new `destination`, then restart.
-
+    ///
     /// Returns a Result containing the destination from the
     /// completed transfer. Returns `Err(_)` if the buffer lengths are
     /// mismatched or if the previous transfer has not yet completed.
@@ -673,7 +673,7 @@ where
     }
 
     /// Modify a completed transfer with a new `source`, then restart.
-
+    ///
     /// Returns a Result containing the source from the
     /// completed transfer. Returns `Err(_)` if the buffer lengths are
     /// mismatched or if the previous transfer has not yet completed.

hal/src/peripherals/nvm/smart_eeprom.rs

@@ -294,7 +294,7 @@ impl<'a, TP: SmartEepromPointableSize> Iterator for SmartEepromIter<'a, TP> {
     }
 }
 
-impl<'a, TP: SmartEepromPointableSize> DoubleEndedIterator for SmartEepromIter<'a, TP> {
+impl<TP: SmartEepromPointableSize> DoubleEndedIterator for SmartEepromIter<'_, TP> {
     fn next_back(&mut self) -> Option<Self::Item> {
         wait_if_busy();
         self.iter.next_back()
@@ -314,7 +314,7 @@ impl<'a, TP: SmartEepromPointableSize> Iterator for SmartEepromIterMut<'a, TP> {
     }
 }
 
-impl<'a, TP: SmartEepromPointableSize> DoubleEndedIterator for SmartEepromIterMut<'a, TP> {
+impl<TP: SmartEepromPointableSize> DoubleEndedIterator for SmartEepromIterMut<'_, TP> {
     fn next_back(&mut self) -> Option<Self::Item> {
         wait_if_busy();
         self.iter.next_back()

hal/src/peripherals/usb/d11/bus.rs

@@ -211,7 +211,7 @@ struct Bank<'a, T> {
     endpoints: Ref<'a, AllEndpoints>,
 }
 
-impl<'a, T> Bank<'a, T> {
+impl<T> Bank<'_, T> {
     fn usb(&self) -> &Device {
         self.usb
     }
@@ -238,7 +238,7 @@ struct InBank;
 /// OutBank represents Out direction banks, Bank #0
 struct OutBank;
 
-impl<'a> Bank<'a, InBank> {
+impl Bank<'_, InBank> {
     fn desc_bank(&mut self) -> &mut DeviceDescBank {
         let idx = self.index();
         self.desc.bank(idx, 1)
@@ -334,7 +334,7 @@ impl<'a> Bank<'a, InBank> {
     }
 }
 
-impl<'a> Bank<'a, OutBank> {
+impl Bank<'_, OutBank> {
     fn desc_bank(&mut self) -> &mut DeviceDescBank {
         let idx = self.index();
         self.desc.bank(idx, 0)

hal/src/peripherals/usb/d5x/bus.rs

@@ -211,7 +211,7 @@ struct Bank<'a, T> {
     endpoints: Ref<'a, AllEndpoints>,
 }
 
-impl<'a, T> Bank<'a, T> {
+impl<T> Bank<'_, T> {
     fn usb(&self) -> &Device {
         self.usb
     }
@@ -238,7 +238,7 @@ struct InBank;
 /// OutBank represents Out direction banks, Bank #0
 struct OutBank;
 
-impl<'a> Bank<'a, InBank> {
+impl Bank<'_, InBank> {
     fn desc_bank(&mut self) -> &mut DeviceDescBank {
         let idx = self.index();
         self.desc.bank(idx, 1)
@@ -328,7 +328,7 @@ impl<'a> Bank<'a, InBank> {
     }
 }
 
-impl<'a> Bank<'a, OutBank> {
+impl Bank<'_, OutBank> {
     fn desc_bank(&mut self) -> &mut DeviceDescBank {
         let idx = self.index();
         self.desc.bank(idx, 0)
@@ -430,7 +430,7 @@ impl<'a> Bank<'a, OutBank> {
     }
 }
 
-impl<'a, T> Bank<'a, T> {
+impl<T> Bank<'_, T> {
     #[inline]
     #[allow(dead_code)]
     fn epcfg(&self, endpoint: usize) -> &pac::usb::device::device_endpoint::Epcfg {