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[CHERI-RISC-V] Extend compression test for disabled -xcheri-rvc
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arichardson committed Feb 9, 2023
1 parent 6e202ef commit 5e74d28
Showing 1 changed file with 50 additions and 4 deletions.
54 changes: 50 additions & 4 deletions llvm/test/CodeGen/RISCV/cheri/compress.ll
Original file line number Diff line number Diff line change
Expand Up @@ -5,19 +5,33 @@
; RUN: cat %s > %t.tgtattr
; RUN: echo 'attributes #0 = { nounwind }' >> %t.tgtattr
; RUN: %riscv32_cheri_purecap_llc -mattr=+c,+xcheri,+cap-mode,+xcheri-rvc -filetype=obj < %t.tgtattr \
; RUN: | llvm-objdump -d -M no-aliases - | FileCheck %s
; RUN: | llvm-objdump -d -M no-aliases --syms - | FileCheck %s
; RUN: %riscv64_cheri_purecap_llc -mattr=+c,+xcheri,+cap-mode,+xcheri-rvc -filetype=obj < %t.tgtattr \
; RUN: | llvm-objdump -d -M no-aliases - | FileCheck %s
; RUN: | llvm-objdump -d -M no-aliases --syms - | FileCheck %s
; RUN: %riscv64_cheri_purecap_llc -mattr=+c,+xcheri,+cap-mode -filetype=obj < %t.tgtattr \
; RUN: | llvm-objdump -d -M no-aliases --syms - | FileCheck %s --check-prefix=NORVC

; RUN: cat %s > %t.fnattr
; RUN: echo 'attributes #0 = { nounwind "target-features"="+c,+xcheri,+cap-mode,+xcheri-rvc" }' >> %t.fnattr
; RUN: %riscv32_cheri_purecap_llc -filetype=obj < %t.fnattr \
; RUN: | llvm-objdump -d --mattr=+c,+xcheri-rvc -M no-aliases - | FileCheck %s
; RUN: | llvm-objdump -d --mattr=+c,+xcheri-rvc -M no-aliases --syms - | FileCheck %s
; RUN: %riscv64_cheri_purecap_llc -filetype=obj < %t.fnattr \
; RUN: | llvm-objdump -d --mattr=+c,+xcheri-rvc -M no-aliases - | FileCheck %s
; RUN: | llvm-objdump -d --mattr=+c,+xcheri-rvc -M no-aliases --syms - | FileCheck %s
; RUN: cat %s > %t.fnattr
; RUN: echo 'attributes #0 = { nounwind "target-features"="+c,+xcheri,+cap-mode" }' >> %t.fnattr
; RUN: %riscv64_cheri_purecap_llc -filetype=obj < %t.fnattr \
; RUN: | llvm-objdump -d --mattr=+c,+xcheri-rvc -M no-aliases --syms - | FileCheck %s --check-prefix=NORVC

; Basic check that we can use CHERI compressed instructions

; Check the size of the functions to check whether we used compressed instructions:
; CHECK-LABEL: SYMBOL TABLE:
; CHECK: 0000001a loadstore
; CHECK: 00000028 call
; NORVC-LABEL: SYMBOL TABLE:
; NORVC: 00000030 loadstore
; NORVC: 00000034 call

define i32 @loadstore(i32 addrspace(200)* %heapint, i8 addrspace(200)* addrspace(200)* %heapptr) addrspace(200) #0 {
; CHECK-LABEL: <loadstore>:
; CHECK-NEXT: c.cincoffset16csp csp, -32
Expand All @@ -33,6 +47,22 @@ define i32 @loadstore(i32 addrspace(200)* %heapint, i8 addrspace(200)* addrspace
; CHECK-NEXT: c.mv a0, a2
; CHECK-NEXT: c.cincoffset16csp csp, 32
; CHECK-NEXT: c.cjr cra

; NORVC-LABEL: <loadstore>:
; NORVC-NEXT: cincoffset csp, csp, -32
; NORVC-NEXT: clw a2, 0(ca0)
; NORVC-NEXT: c.li a3, 1
; NORVC-NEXT: csw a3, 0(ca0)
; NORVC-NEXT: clc ca0, 0(ca1)
; NORVC-NEXT: csc ca0, 0(ca1)
; NORVC-NEXT: csc ca0, 16(csp)
; NORVC-NEXT: clc ca0, 16(csp)
; NORVC-NEXT: csw a2, 0(csp)
; NORVC-NEXT: clw a0, 0(csp)
; NORVC-NEXT: c.mv a0, a2
; NORVC-NEXT: cincoffset csp, csp, 32
; NORVC-NEXT: cjalr cnull, 0(cra)

%stackptr = alloca i8 addrspace(200)*, align 16, addrspace(200)
%stackint = alloca i32, align 16, addrspace(200)
%val = load volatile i32, i32 addrspace(200)* %heapint
Expand Down Expand Up @@ -62,6 +92,22 @@ define i32 @call() addrspace(200) #0 {
; CHECK-NEXT: c.clccsp cra, {{104|128}}(csp)
; CHECK-NEXT: c.cincoffset16csp csp, {{112|144}}
; CHECK-NEXT: c.cjr cra

; NORVC-LABEL: <call>:
; NORVC-NEXT: cincoffset csp, csp, -144
; NORVC-NEXT: csc cra, 128(csp)
; NORVC-NEXT: cincoffset ca0, csp, 64
; NORVC-NEXT: csetbounds ca0, ca0, 64
; NORVC-NEXT: cincoffset ca1, ca0, 48
; NORVC-NEXT: cincoffset ca0, csp, 0
; NORVC-NEXT: csetbounds ca0, ca0, 64
; NORVC-NEXT: cincoffset ca0, ca0, 12
; NORVC-NEXT: auipcc cra, 0
; NORVC-NEXT: cjalr cra, 0(cra)
; NORVC-NEXT: clc cra, 128(csp)
; NORVC-NEXT: cincoffset csp, csp, 144
; NORVC-NEXT: cjalr cnull, 0(cra)

%ptrarray = alloca [4 x i8 addrspace(200)*], align 16, addrspace(200)
%intarray = alloca [16 x i32], align 1, addrspace(200)
%ptrgep = getelementptr inbounds [4 x i8 addrspace(200)*], [4 x i8 addrspace(200)*] addrspace(200)* %ptrarray, i64 0, i64 3
Expand Down

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