Merge pull request #6 from facchinm/spifat_fixes

Miscellaneous fixes to tackle #4
arduino · Dec 18, 2024 · 0d328e5 · 0d328e5
2 parents 5a2af3d + 27fb215
commit 0d328e5
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Showing 10 changed files with 2,824 additions and 2,549 deletions.
diff --git a/cores/arduino/Arduino.h b/cores/arduino/Arduino.h
@@ -107,6 +107,11 @@ void noInterrupts(void);
 
 int digitalPinToInterrupt(pin_size_t pin);
 
+#define digitalPinToPort(x) (x)
+#define digitalPinToBitMask(x) (x)
+#define portOutputRegister(x) (x)
+#define portInputRegister(x) (x)
+
 #include <variant.h>
 #ifdef __cplusplus
 #include <SerialUSB.h>

diff --git a/cores/arduino/abi.cpp b/cores/arduino/abi.cpp
diff --git a/cores/arduino/new.cpp b/cores/arduino/new.cpp
@@ -6,6 +6,8 @@
 
 #include "new.h"
 
+extern "C" void __cxa_pure_virtual() {}
+
 // The C++ spec dictates that allocation failure should cause the
 // (non-nothrow version of the) operator new to throw an exception.
 // Since we expect to have exceptions disabled, it would be more

diff --git a/cores/arduino/zephyrCommon.cpp b/cores/arduino/zephyrCommon.cpp
@@ -170,7 +170,7 @@ const struct adc_dt_spec arduino_adc[] =
 const pin_size_t arduino_analog_pins[] =
   { DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), adc_pin_gpios, ADC_PINS) };
 
-struct adc_channel_cfg channel_cfg[ARRAY_SIZE(arduino_analog_pins)] =
+struct adc_channel_cfg channel_cfg[] =
   { DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), io_channels, ADC_CH_CFG) };
 
 size_t analog_pin_index(pin_size_t pinNumber) {

diff --git a/firmwares/zephyr-arduino_giga_r1_m7.bin b/firmwares/zephyr-arduino_giga_r1_m7.bin
diff --git a/firmwares/zephyr-arduino_giga_r1_m7.elf b/firmwares/zephyr-arduino_giga_r1_m7.elf
diff --git a/libraries/SPI/SPI.cpp b/libraries/SPI/SPI.cpp
@@ -79,9 +79,13 @@ void arduino::ZephyrSPI::usingInterrupt(int interruptNumber) {
 void arduino::ZephyrSPI::notUsingInterrupt(int interruptNumber) {
 }
 
+#ifndef SPI_MIN_CLOCK_FEQUENCY
+#define SPI_MIN_CLOCK_FEQUENCY 1000000
+#endif
+
 void arduino::ZephyrSPI::beginTransaction(SPISettings settings) {
   memset(&config, 0, sizeof(config));
-  config.frequency = settings.getClockFreq();
+  config.frequency = settings.getClockFreq() > SPI_MIN_CLOCK_FEQUENCY ? settings.getClockFreq() : SPI_MIN_CLOCK_FEQUENCY;
   auto mode = SPI_MODE_CPOL | SPI_MODE_CPHA;
   switch (settings.getDataMode()) {
     case SPI_MODE0:

diff --git a/loader/llext_exports.c b/loader/llext_exports.c
@@ -6,6 +6,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <math.h>
+#include <zephyr/kernel.h>
 
 #define FORCE_EXPORT_SYM(name) \
        extern void name(void); \
@@ -35,6 +36,13 @@ EXPORT_SYMBOL(isspace);
 EXPORT_SYMBOL(isalnum);
 EXPORT_SYMBOL(tolower);
 EXPORT_SYMBOL(toupper);
+EXPORT_SYMBOL(isalpha);
+EXPORT_SYMBOL(iscntrl);
+EXPORT_SYMBOL(isdigit);
+EXPORT_SYMBOL(isgraph);
+EXPORT_SYMBOL(isprint);
+EXPORT_SYMBOL(isupper);
+EXPORT_SYMBOL(isxdigit);
 
 #if defined(CONFIG_USB_DEVICE_STACK)
 EXPORT_SYMBOL(usb_enable);
@@ -96,8 +104,8 @@ FORCE_EXPORT_SYM(inet_pton);
 FORCE_EXPORT_SYM(cdc_acm_dte_rate_callback_set);
 #endif
 
-FORCE_EXPORT_SYM(k_timer_init);
-FORCE_EXPORT_SYM(k_fatal_halt);
+EXPORT_SYMBOL(k_timer_init);
+EXPORT_SYMBOL(k_fatal_halt);
 //FORCE_EXPORT_SYM(k_timer_user_data_set);
 //FORCE_EXPORT_SYM(k_timer_start);
 

diff --git a/variants/arduino_giga_r1_m7/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h b/variants/arduino_giga_r1_m7/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h
@@ -117,13 +117,17 @@
 #define CONFIG_ZEPHYR_CMSIS_MODULE 1
 #define CONFIG_HAS_CMSIS_CORE 1
 #define CONFIG_HAS_CMSIS_CORE_M 1
+#define CONFIG_ZEPHYR_ADI_MODULE 1
 #define CONFIG_ZEPHYR_HAL_AMBIQ_MODULE 1
+#define CONFIG_ZEPHYR_ATMEL_MODULE 1
 #define CONFIG_ZEPHYR_HAL_ESPRESSIF_MODULE 1
 #define CONFIG_ZEPHYR_HAL_INFINEON_MODULE 1
 #define CONFIG_ZEPHYR_HAL_INTEL_MODULE 1
 #define CONFIG_ZEPHYR_HAL_NORDIC_MODULE 1
 #define CONFIG_ZEPHYR_HAL_NXP_MODULE 1
 #define CONFIG_ZEPHYR_HAL_RENESAS_MODULE 1
+#define CONFIG_ZEPHYR_HAL_RPI_PICO_MODULE 1
+#define CONFIG_ZEPHYR_HAL_SILABS_MODULE 1
 #define CONFIG_ZEPHYR_STM32_MODULE 1
 #define CONFIG_ZEPHYR_TI_MODULE 1
 #define CONFIG_ZEPHYR_XTENSA_MODULE 1