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Add HOCOCR2 system register definition #350

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Add HOCOCR2 system register definition #350

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59 changes: 59 additions & 0 deletions svd/R7FA4M1AB.svd
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Original file line number Diff line number Diff line change
Expand Up @@ -2213,6 +2213,65 @@ Note: MOMCR register must be set before setting MOSTP to 0.</description>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>HOCOCR2</name>
<description>High-Speed On-Chip Oscillator Control Register 2</description>
<addressOffset>0x037</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xC7</resetMask>
<fields>
<field>
<name>Reserved</name>
<description>These bits are read as 00. The write value should be 00.</description>
<lsb>6</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
<field>
<name>HCFRQ1</name>
<description>HOCO Frequency Setting 1</description>
<lsb>3</lsb>
<msb>5</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>000</name>
<description>24 MHz</description>
<value>#000</value>
</enumeratedValue>
<enumeratedValue>
<name>010</name>
<description>32 MHz</description>
<value>#010</value>
</enumeratedValue>
<enumeratedValue>
<name>100</name>
<description>48 MHz</description>
<value>#100</value>
</enumeratedValue>
<enumeratedValue>
<name>101</name>
<description>64 MHz</description>
<value>#101</value>
</enumeratedValue>
<enumeratedValue>
<name>others</name>
<description>Setting prohibited</description>
<isDefault>true</isDefault>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>Reserved</name>
<description>These bits are read as 000. The write value should be 000.</description>
<lsb>0</lsb>
<msb>2</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MOCOCR</name>
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47 changes: 47 additions & 0 deletions svd/R7FA6M5BH.svd
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Expand Up @@ -9869,6 +9869,53 @@ http://www.renesas.com/disclaimer \n
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>HOCOCR2</name>
<description>High-Speed On-Chip Oscillator Control Register 2</description>
<addressOffset>0x037</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xFC</resetMask>
<fields>
<field>
<name>Reserved</name>
<description>These bits are read as 000000. The write value should be 000000.</description>
<lsb>2</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
<field>
<name>HCFRQ1</name>
<description>HOCO Frequency Setting 0</description>
<lsb>0</lsb>
<msb>1</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>00</name>
<description>16 MHz</description>
<value>#00</value>
</enumeratedValue>
<enumeratedValue>
<name>01</name>
<description>18 MHz</description>
<value>#01</value>
</enumeratedValue>
<enumeratedValue>
<name>10</name>
<description>20 MHz</description>
<value>#10</value>
</enumeratedValue>
<enumeratedValue>
<name>others</name>
<description>Setting prohibited</description>
<isDefault>true</isDefault>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>MOCOCR</name>
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22 changes: 20 additions & 2 deletions variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h
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Expand Up @@ -8892,7 +8892,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure
uint8_t : 7;
} HOCOCR_b;
};
__IM uint8_t RESERVED8;

union
{
__IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register
* 2 */

struct
{
__IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */
uint8_t : 1;
__IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */
uint8_t : 2;
} HOCOCR2_b;
};

union
{
Expand Down Expand Up @@ -16145,7 +16158,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure
/* ======================================================== HOCOCR ========================================================= */
#define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */
#define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== MOCOCR ========================================================= */
/* ======================================================== HOCOCR2 ======================================================== */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */
/* ======================================================== MOCOCR ========================================================= */
#define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */
#define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== FLLCR1 ========================================================= */
Expand Down
22 changes: 20 additions & 2 deletions variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h
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Expand Up @@ -7967,7 +7967,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure
uint8_t : 7;
} HOCOCR_b;
};
__IM uint8_t RESERVED8;

union
{
__IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register
* 2 */

struct
{
__IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */
uint8_t : 1;
__IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */
uint8_t : 2;
} HOCOCR2_b;
};

union
{
Expand Down Expand Up @@ -13697,7 +13710,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure
/* ======================================================== HOCOCR ========================================================= */
#define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */
#define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== MOCOCR ========================================================= */
/* ======================================================== HOCOCR2 ======================================================== */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */
/* ======================================================== MOCOCR ========================================================= */
#define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */
#define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== FLLCR1 ========================================================= */
Expand Down
22 changes: 20 additions & 2 deletions variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h
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Expand Up @@ -7785,7 +7785,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure
uint8_t : 7;
} HOCOCR_b;
};
__IM uint8_t RESERVED8;

union
{
__IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register
* 2 */

struct
{
__IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */
uint8_t : 1;
__IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */
uint8_t : 2;
} HOCOCR2_b;
};

union
{
Expand Down Expand Up @@ -13456,7 +13469,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure
/* ======================================================== HOCOCR ========================================================= */
#define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */
#define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== MOCOCR ========================================================= */
/* ======================================================== HOCOCR2 ======================================================== */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */
/* ======================================================== MOCOCR ========================================================= */
#define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */
#define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== FLLCR1 ========================================================= */
Expand Down
22 changes: 20 additions & 2 deletions variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h
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Expand Up @@ -8634,7 +8634,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure
uint8_t : 7;
} HOCOCR_b;
};
__IM uint8_t RESERVED8;

union
{
__IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register
* 2 */

struct
{
__IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */
uint8_t : 1;
__IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */
uint8_t : 2;
} HOCOCR2_b;
};

union
{
Expand Down Expand Up @@ -14833,7 +14846,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure
/* ======================================================== HOCOCR ========================================================= */
#define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */
#define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== MOCOCR ========================================================= */
/* ======================================================== HOCOCR2 ======================================================== */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */
/* ======================================================== MOCOCR ========================================================= */
#define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */
#define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== FLLCR1 ========================================================= */
Expand Down
22 changes: 20 additions & 2 deletions variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h
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Expand Up @@ -8574,7 +8574,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure
uint8_t : 7;
} HOCOCR_b;
};
__IM uint8_t RESERVED8;

union
{
__IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register
* 2 */

struct
{
__IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */
uint8_t : 1;
__IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */
uint8_t : 2;
} HOCOCR2_b;
};

union
{
Expand Down Expand Up @@ -16004,7 +16017,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure
/* ======================================================== HOCOCR ========================================================= */
#define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */
#define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== MOCOCR ========================================================= */
/* ======================================================== HOCOCR2 ======================================================== */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */
#define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */
#define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */
/* ======================================================== MOCOCR ========================================================= */
#define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */
#define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */
/* ======================================================== FLLCR1 ========================================================= */
Expand Down
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