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Upgrade packer and send more FF data #201

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merged 21 commits into from
Feb 4, 2024
Merged

Upgrade packer and send more FF data #201

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79fa15c
upgrade packer
pkotamnives Nov 16, 2023
1732199
Merge branch 'master' into dev_packerv2
pkotamnives Nov 21, 2023
ae0dada
apply clang format
pkotamnives Nov 21, 2023
6bada04
fix message[4] error
pkotamnives Nov 21, 2023
df40fbf
fix code; testing on apollo205 and new packer2 is working now
pkotamnives Dec 6, 2023
39a3d2e
fix clang format
pkotamnives Dec 6, 2023
b55191f
demonstate unable to write to reg above 0xff in zynq
pkotamnives Jan 15, 2024
fdcbe2b
fix rollover in Task.h
pkotamnives Jan 15, 2024
3598473
apply bug fix and correction in #204 and ff_laser_fault #202
pkotamnives Jan 15, 2024
a569fcd
clean-up
pkotamnives Jan 15, 2024
a5c8a04
fix clang format + ret uninitialized
pkotamnives Jan 15, 2024
2b04695
Update LocalTasks.c
pwittich Jan 18, 2024
b8feb1e
Update PL_MEM_CM_rev2.yml
pwittich Jan 18, 2024
680565b
Update PL_MEM_CM_rev2.yml
pwittich Jan 18, 2024
9c661ab
Clean up my last fixes :-|
pwittich Jan 19, 2024
76afd30
Apply clang-format changes
pwittich Jan 19, 2024
0e1a0e5
correct ff registers masks + no stale in ff_ctrl
pkotamnives Feb 2, 2024
899bbb5
resolve conflict
pkotamnives Feb 2, 2024
75fdad7
add comments to xml_generage.py + resolve clkr0a overlap in YML
pkotamnives Feb 2, 2024
9a4ff04
add clkmon and overlapped mask constraints to script + clean zynmontask
pkotamnives Feb 2, 2024
58fc914
fix clang + a bit clean up
pkotamnives Feb 2, 2024
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138 changes: 68 additions & 70 deletions projects/cm_mcu/LocalTasks.c
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Original file line number Diff line number Diff line change
Expand Up @@ -173,10 +173,10 @@ struct sm_command_t sm_command_ffldaq_f1[] = {
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{1, 0x00, 0x03, 1, "FF_LOS_ALARM", 0xff, "", PM_STATUS},
{1, 0x00, 0x05, 1, "FF_CDR_LOL_ALARM", 0xff, "", PM_STATUS},
{2, 0x00, 0x22, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 4 Rx-ch registers with increasing addresses
{2, 0x00, 0x24, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x26, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x28, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x22, 2, "FF_CH01_OPT_POW", 0xffff, "0.1uW", PM_STATUS}, // read 4 Rx-ch registers with increasing addresses
{2, 0x00, 0x24, 2, "FF_CH02_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x00, 0x26, 2, "FF_CH03_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x00, 0x28, 2, "FF_CH04_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
};

uint16_t ffldaq_f1_values[NSUPPLIES_FFLDAQ_F1 * NCOMMANDS_FFLDAQ_F1];
Expand Down Expand Up @@ -204,44 +204,44 @@ struct MonitorI2CTaskArgs_t ffldaq_f1_args = {
struct sm_command_t sm_command_fflit_f1[] = {
{1, 0x00, 0x02, 2, "FF_STATUS_REG", 0xff, "", PM_STATUS},
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x07, 2, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 2, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
// there are no registers to read optical power for 14Gbps ECUO.
// registers below are a placeholder with a reading equal to zero
// the reason we need them because n_commands is fixed
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "0.1uW", PM_STATUS},

};
// register maps for OT-DTC Fireflies 12-ch part -- 25Gbps ECUO (no connected devices to test as of 08.04.22)
// **commands below have not been tested yet**
struct sm_command_t sm_command_fflot_f1[] = {
{1, 0x00, 0x02, 2, "FF_STATUS_REG", 0xff, "", PM_STATUS},
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x01, 0xe4, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 12 Rx-ch registers with decreasing addresses
{2, 0x01, 0xe2, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe0, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xde, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xdc, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xda, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd8, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd6, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd4, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd2, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd0, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xce, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x07, 2, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 2, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x01, 0xe4, 2, "FF_CH01_OPT_POW", 0xffff, "0.1uW", PM_STATUS}, // read 12 Rx-ch registers with decreasing addresses
{2, 0x01, 0xe2, 2, "FF_CH02_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xe0, 2, "FF_CH03_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xde, 2, "FF_CH04_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xdc, 2, "FF_CH05_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xda, 2, "FF_CH06_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd8, 2, "FF_CH07_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd6, 2, "FF_CH08_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd4, 2, "FF_CH09_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd2, 2, "FF_CH10_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd0, 2, "FF_CH11_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xce, 2, "FF_CH12_OPT_POW", 0xffff, "0.1uW", PM_STATUS},

};

Expand Down Expand Up @@ -319,10 +319,10 @@ struct sm_command_t sm_command_ffldaq_f2[] = {
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{1, 0x00, 0x03, 1, "FF_LOS_ALARM", 0xff, "", PM_STATUS},
{1, 0x00, 0x05, 1, "FF_CDR_LOL_ALARM", 0xff, "", PM_STATUS},
{2, 0x00, 0x22, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 4 Rx-ch registers with increasing addresses
{2, 0x00, 0x24, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x26, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x28, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x22, 2, "FF_CH01_OPT_POW", 0xffff, "0.1uW", PM_STATUS}, // read 4 Rx-ch registers with increasing addresses
{2, 0x00, 0x24, 2, "FF_CH02_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x00, 0x26, 2, "FF_CH03_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x00, 0x28, 2, "FF_CH04_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
};
uint16_t ffldaq_f2_values[NSUPPLIES_FFLDAQ_F2 * NCOMMANDS_FFLDAQ_F2];

Expand All @@ -349,43 +349,43 @@ struct MonitorI2CTaskArgs_t ffldaq_f2_args = {
struct sm_command_t sm_command_fflit_f2[] = {
{1, 0x00, 0x02, 2, "FF_STATUS_REG", 0xff, "", PM_STATUS},
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x07, 2, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 2, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
// there are no registers to read optical power for 14Gbps ECUO.
// registers below are a placeholder with a reading equal to zero
// the reason we need them because n_commands is fixed
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "0.1uW", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "0.1uW", PM_STATUS},
};
// register maps for OT-DTC Fireflies 12-ch part -- 25Gbps ECUO (no connected devices to test as of 08.04.22)
// **commands below have not been tested yet**
struct sm_command_t sm_command_fflot_f2[] = {
{1, 0x00, 0x02, 2, "FF_STATUS_REG", 0xff, "", PM_STATUS},
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x01, 0xe4, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 12 Rx-ch registers with decreasing addresses
{2, 0x01, 0xe2, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe0, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xde, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xdc, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xda, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd8, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd6, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd4, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd2, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd0, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xce, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x07, 2, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 2, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x01, 0xe4, 2, "FF_CH01_OPT_POW", 0xffff, "0.1uW", PM_STATUS}, // read 12 Rx-ch registers with decreasing addresses
{2, 0x01, 0xe2, 2, "FF_CH02_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xe0, 2, "FF_CH03_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xde, 2, "FF_CH04_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xdc, 2, "FF_CH05_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xda, 2, "FF_CH06_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd8, 2, "FF_CH07_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd6, 2, "FF_CH08_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd4, 2, "FF_CH09_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd2, 2, "FF_CH10_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xd0, 2, "FF_CH11_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
{2, 0x01, 0xce, 2, "FF_CH12_OPT_POW", 0xffff, "0.1uW", PM_STATUS},
};

#ifdef REV1
Expand Down Expand Up @@ -447,8 +447,7 @@ struct dev_moni2c_addr_t clk_moni2c_addrs[CLOCK_NUM_SI5395] = {

struct sm_command_t sm_command_clk[] = {
// device information on page 0 : table 16.2 and 16.4
{1, 0x00, 0x02, 1, "PN_BASE", 0xff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x03, 1, "PN_BASE", 0xff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x02, 2, "PN_BASE", 0xffff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x05, 1, "DEVICE_REV", 0xff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x0B, 1, "I2C_ADDR", 0x7f, "", PM_STATUS}, // page 0x00
// internal statuses on page 0 : table 16.8 and 16.9
Expand Down Expand Up @@ -484,8 +483,7 @@ struct dev_moni2c_addr_t clkr0a_moni2c_addrs[CLOCK_NUM_SI5341] = {

struct sm_command_t sm_command_clkr0a[] = {
// device information on page 0 : table 14.4 and 14.6
{1, 0x00, 0x02, 1, "PN_BASE", 0xff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x03, 1, "PN_BASE", 0xff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x02, 2, "PN_BASE", 0xffff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x05, 1, "DEVICE_REV", 0xff, "", PM_STATUS}, // page 0x00
{1, 0x00, 0x0B, 1, "I2C_ADDR", 0xff, "", PM_STATUS}, // page 0x00
// internal statuses on page 0 : table 14.5
Expand Down Expand Up @@ -719,7 +717,7 @@ uint16_t getFFtemp(const uint8_t i)
}

#ifdef REV2
uint16_t getFFoptpow(const uint8_t i)
uint16_t getFFavgoptpow(const uint8_t i)
{

uint16_t avg_val = 0;
Expand Down Expand Up @@ -818,7 +816,7 @@ void getFFpart()
strncpy(vendor_string, vendor_string_rxch, nstring);
}
else {
if (strncmp(vendor_string_rxch, vendor_string, nstring) == 0 && (strstr(vendor_string_rxch, "14") == NULL) && (strstr(vendor_string_rxch, "CRRNB") == NULL)) {
if (strstr(vendor_string_rxch, "14") == NULL && strstr(vendor_string_rxch, "CRRNB") == NULL) {
tmp_ffpart_bit_mask = tmp_ffpart_bit_mask | (0x1U << n); // bit 1 for a 25Gbs ch and assign to a Bit-mask of Firefly 12-ch part
}
else {
Expand Down
2 changes: 1 addition & 1 deletion projects/cm_mcu/MonitorI2CTask.c
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ void MonitorI2CTask(void *parameters)
// grab the semaphore to ensure unique access to I2C controller
if (args->xSem != NULL) {
if (acquireI2CSemaphore(args->xSem) == pdFAIL) {
log_warn(LOG_SERVICE, "%s could not get semaphore in time; delay & continue\r\n", args->name);
log_debug(LOG_SERVICE, "%s could not get semaphore in time; delay & continue\r\n", args->name);
vTaskDelayUntil(&(args->updateTick), pdMS_TO_TICKS(10)); // wait
continue;
}
Expand Down
4 changes: 2 additions & 2 deletions projects/cm_mcu/MonitorI2CTask.h
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Original file line number Diff line number Diff line change
Expand Up @@ -89,11 +89,11 @@ extern struct MonitorI2CTaskArgs_t ffl12_f2_args;
extern struct MonitorI2CTaskArgs_t ffldaq_f2_args;

#define NSUPPLIES_CLK (4)
#define NCOMMANDS_CLK 8 // number of commands
#define NCOMMANDS_CLK 7 // number of commands
#define NCOMMANDS_FLG_CLK 1 // number of sticky commands
#define NPAGES_CLK 1 //
#define NSUPPLIES_CLKR0A (1)
#define NCOMMANDS_CLKR0A 8 // number of commands
#define NCOMMANDS_CLKR0A 7 // number of commands
#define NCOMMANDS_FLG_CLKR0A 2 // number of sticky commands
#define NPAGES_CLKR0A 1 //

Expand Down
6 changes: 3 additions & 3 deletions projects/cm_mcu/Tasks.h
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Original file line number Diff line number Diff line change
Expand Up @@ -199,7 +199,7 @@ bool isEnabledFF(int ff);
void setFFmask(uint32_t ff_combined_mask);
void readFFpresent(void);
uint16_t getFFtemp(const uint8_t i);
uint16_t getFFoptpow(const uint8_t i);
uint16_t getFFavgoptpow(const uint8_t i);
uint16_t getFFpresentbit(const uint8_t i);
#ifdef REV2
void getFFpart(void);
Expand Down Expand Up @@ -331,9 +331,9 @@ void EEPROMTask(void *parameters);
extern QueueHandle_t xZynqMonQueue;
void ZynqMonTask(void *parameters);
// data for zynqmon task to be sent to Zynq
#define ZM_NUM_ENTRIES 256
#define ZM_NUM_ENTRIES 1024
struct zynqmon_data_t {
uint8_t sensor;
uint16_t sensor;
union convert_16_t {
uint16_t us; // cppcheck-suppress unusedStructMember
uint8_t uc[2]; // cppcheck-suppress unusedStructMember
Expand Down
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