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fix build rev1 + clang format
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@pkotamnives
pkotamnives committed Oct 13, 2023
1 parent 56b3340 commit 2d87188
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Showing 11 changed files with 1,664 additions and 1,680 deletions.
557 changes: 278 additions & 279 deletions .pylintrc
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168 changes: 84 additions & 84 deletions projects/cm_mcu/LocalTasks.c
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Original file line number Diff line number Diff line change
Expand Up @@ -166,9 +166,9 @@ struct sm_command_t sm_command_ffldaq_f1[] = {
{1, 0x00, 0x03, 1, "FF_LOS_ALARM", 0xff, "", PM_STATUS},
{1, 0x00, 0x05, 1, "FF_CDR_LOL_ALARM", 0xff, "", PM_STATUS},
{2, 0x00, 0x22, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 4 Rx-ch registers with increasing addresses
{2, 0x00, 0x24, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x26, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x28, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x24, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x26, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x28, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
};

uint16_t ffldaq_f1_values[NSUPPLIES_FFLDAQ_F1 * NCOMMANDS_FFLDAQ_F1];
Expand Down Expand Up @@ -200,21 +200,21 @@ struct sm_command_t sm_command_fflit_f1[] = {
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
// there are no registers to read optical power for 14Gbps ECUO.
// registers below are a placeholder with a reading equal to zero
// the reason we need them because n_commands is fixed
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
// there are no registers to read optical power for 14Gbps ECUO.
// registers below are a placeholder with a reading equal to zero
// the reason we need them because n_commands is fixed
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},

};
// register maps for OT-DTC Fireflies 12-ch part -- 25Gbps ECUO (no connected devices to test as of 08.04.22)
Expand All @@ -225,17 +225,17 @@ struct sm_command_t sm_command_fflot_f1[] = {
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x01, 0xe4, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 12 Rx-ch registers with decreasing addresses
{2, 0x01, 0xe2, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe0, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xde, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xdc, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xda, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd8, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd6, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd4, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd2, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd0, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xce, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe2, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe0, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xde, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xdc, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xda, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd8, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd6, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd4, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd2, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd0, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xce, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},

};

Expand Down Expand Up @@ -316,9 +316,9 @@ struct sm_command_t sm_command_ffldaq_f2[] = {
{1, 0x00, 0x03, 1, "FF_LOS_ALARM", 0xff, "", PM_STATUS},
{1, 0x00, 0x05, 1, "FF_CDR_LOL_ALARM", 0xff, "", PM_STATUS},
{2, 0x00, 0x22, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 4 Rx-ch registers with increasing addresses
{2, 0x00, 0x24, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x26, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x28, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x24, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x26, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x00, 0x28, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
};
uint16_t ffldaq_f2_values[NSUPPLIES_FFLDAQ_F2 * NCOMMANDS_FFLDAQ_F2];

Expand Down Expand Up @@ -349,21 +349,21 @@ struct sm_command_t sm_command_fflit_f2[] = {
{1, 0x00, 0x16, 2, "FF_TEMPERATURE", 0xff, "C", PM_STATUS},
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
// there are no registers to read optical power for 14Gbps ECUO.
// registers below are a placeholder with a reading equal to zero
// the reason we need them because n_commands is fixed
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
// there are no registers to read optical power for 14Gbps ECUO.
// registers below are a placeholder with a reading equal to zero
// the reason we need them because n_commands is fixed
{1, 0x00, 0x00, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{1, 0x00, 0x00, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
};
// register maps for OT-DTC Fireflies 12-ch part -- 25Gbps ECUO (no connected devices to test as of 08.04.22)
// **commands below have not been tested yet**
Expand All @@ -373,17 +373,17 @@ struct sm_command_t sm_command_fflot_f2[] = {
{2, 0x00, 0x07, 1, "FF_LOS_ALARM", 0xffff, "", PM_STATUS},
{2, 0x00, 0x14, 1, "FF_CDR_LOL_ALARM", 0xffff, "", PM_STATUS},
{2, 0x01, 0xe4, 1, "FF_CH01_OPT_POW", 0xff, "mw", PM_STATUS}, // read 12 Rx-ch registers with decreasing addresses
{2, 0x01, 0xe2, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe0, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xde, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xdc, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xda, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd8, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd6, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd4, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd2, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd0, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xce, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe2, 1, "FF_CH02_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xe0, 1, "FF_CH03_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xde, 1, "FF_CH04_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xdc, 1, "FF_CH05_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xda, 1, "FF_CH06_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd8, 1, "FF_CH07_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd6, 1, "FF_CH08_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd4, 1, "FF_CH09_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd2, 1, "FF_CH10_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xd0, 1, "FF_CH11_OPT_POW", 0xff, "mw", PM_STATUS},
{2, 0x01, 0xce, 1, "FF_CH12_OPT_POW", 0xff, "mw", PM_STATUS},
};

#ifdef REV1
Expand Down Expand Up @@ -717,42 +717,42 @@ uint16_t getFFtemp(const uint8_t i)
uint16_t getFFoptpow(const uint8_t i)
{

uint16_t avg_val;
uint16_t sum_val;
uint16_t avg_val = 0;
uint16_t sum_val = 0;
configASSERT(i < NFIREFLIES);
if (i < NFIREFLIES_IT_F1) {
for (int i1 = 4; i1 < ffl12_f1_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[0].int_idx + ff_moni2c_arg[0].dev_int_idx;
int index = dev * (ffl12_f1_args.n_commands * ffl12_f1_args.n_pages) + i1;
sum_val += ffl12_f1_args.sm_values[index];
}
avg_val = sum_val/(ffl12_f1_args.n_commands-4);
for (int i1 = 4; i1 < ffl12_f1_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[0].int_idx + ff_moni2c_arg[0].dev_int_idx;
int index = dev * (ffl12_f1_args.n_commands * ffl12_f1_args.n_pages) + i1;
sum_val += ffl12_f1_args.sm_values[index];
}
avg_val = sum_val / (ffl12_f1_args.n_commands - 4);
}

else if (NFIREFLIES_IT_F1 <= i && i < NFIREFLIES_IT_F1 + NFIREFLIES_DAQ_F1) {
for (int i1 = 4; i1 < ffldaq_f1_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[1].int_idx + ff_moni2c_arg[1].dev_int_idx;
int index = (dev) * (ffldaq_f1_args.n_commands * ffldaq_f1_args.n_pages) + i1;
sum_val += ffldaq_f1_args.sm_values[index];
}
avg_val = sum_val/(ffldaq_f1_args.n_commands-4);
for (int i1 = 4; i1 < ffldaq_f1_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[1].int_idx + ff_moni2c_arg[1].dev_int_idx;
int index = (dev) * (ffldaq_f1_args.n_commands * ffldaq_f1_args.n_pages) + i1;
sum_val += ffldaq_f1_args.sm_values[index];
}
avg_val = sum_val / (ffldaq_f1_args.n_commands - 4);
}

else if (NFIREFLIES_F1 <= i && i < NFIREFLIES_F1 + NFIREFLIES_IT_F2) {
for (int i1 = 4; i1 < ffl12_f2_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[2].int_idx + ff_moni2c_arg[2].dev_int_idx;
int index = (dev) * (ffl12_f2_args.n_commands * ffl12_f2_args.n_pages) + i1;
sum_val += ffl12_f2_args.sm_values[index];
}
avg_val = sum_val/(ffl12_f2_args.n_commands-4);
for (int i1 = 4; i1 < ffl12_f2_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[2].int_idx + ff_moni2c_arg[2].dev_int_idx;
int index = (dev) * (ffl12_f2_args.n_commands * ffl12_f2_args.n_pages) + i1;
sum_val += ffl12_f2_args.sm_values[index];
}
avg_val = sum_val / (ffl12_f2_args.n_commands - 4);
}
else {
for (int i1 = 4; i1 < ffldaq_f2_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[3].int_idx + ff_moni2c_arg[3].dev_int_idx;
int index = (dev) * (ffldaq_f2_args.n_commands * ffldaq_f2_args.n_pages) + i1;
sum_val += ffldaq_f2_args.sm_values[index];
}
avg_val = sum_val/(ffldaq_f2_args.n_commands-4);
for (int i1 = 4; i1 < ffldaq_f2_args.n_commands; ++i1) {
int dev = i - ff_moni2c_arg[3].int_idx + ff_moni2c_arg[3].dev_int_idx;
int index = (dev) * (ffldaq_f2_args.n_commands * ffldaq_f2_args.n_pages) + i1;
sum_val += ffldaq_f2_args.sm_values[index];
}
avg_val = sum_val / (ffldaq_f2_args.n_commands - 4);
}
return avg_val;
}
Expand Down
8 changes: 4 additions & 4 deletions projects/cm_mcu/MonitorI2CTask.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,9 @@ struct MonitorI2CTaskArgs_t {
#define NSUPPLIES_FFL12_F1 (8)
#else // REV1
#define NSUPPLIES_FFL12_F1 (6)
#endif // REV 2
#endif // REV 2
#define NCOMMANDS_FFL12_F1 16 // number of commands
#define NPAGES_FFL12_F1 1 // number of pages on the 12-channel firefly ports
#define NPAGES_FFL12_F1 1 // number of pages on the 12-channel firefly ports

#ifndef REV2
#define NSUPPLIES_FFLDAQ_F2 (10)
Expand All @@ -77,9 +77,9 @@ struct MonitorI2CTaskArgs_t {
#define NSUPPLIES_FFL12_F2 (4)
#else // REV1
#define NSUPPLIES_FFL12_F2 (6)
#endif // REV 2
#endif // REV 2
#define NCOMMANDS_FFL12_F2 16 // number of commands
#define NPAGES_FFL12_F2 1 // number of pages on the 12-channel firefly ports
#define NPAGES_FFL12_F2 1 // number of pages on the 12-channel firefly ports

extern struct dev_moni2c_addr_t ffl12_f1_moni2c_addrs[NFIREFLIES_IT_F1];
extern struct dev_moni2c_addr_t ffldaq_f1_moni2c_addrs[NFIREFLIES_DAQ_F1];
Expand Down
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