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Samuelopez-ansys committed Nov 24, 2023
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34 changes: 34 additions & 0 deletions CONTRIBUTING.md
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Expand Up @@ -12,3 +12,37 @@ questions or submissions to this repository.
For contributing to this project, please refer to the [PyAnsys Developer's Guide].

[PyAnsys Developer's Guide]: https://dev.docs.pyansys.com/index.html

## Directing Issues and Features Requests

For reporting bugs and proposing new features, please use the Issues tab instead of the Discussions tab. This will help us track and prioritize work in a more organized manner.

## Purpose of Discussions

The Discussions tab should primarily be used for general questions and discussions about the project. This could include discussions about potential improvements, the future direction of the project, brainstorming ideas, help with using the software, and other topics that don't exactly fit as an Issue.

Remember, maintaining distinct places for different types of interactions helps keep our project organized and moving forward in a coordinated manner.

## Modify the Code

Everyone can contribute to this project, irrespective of their level of expertise. Your diverse skills, perspectives, and experiences are valuable and we welcome them.

Here's a simple overview of how you can start making contributions:

**Fork the Repository:** "Forking" means creating a personal copy of this repository on your GitHub account.

**Clone the Repository:** After forking, you need to download the repository to your local machine. This can be done using the `git clone` command.

**Create a New Branch:** A branch is used to isolate your changes from the main project. You can create a new branch using the `git branch` command. Remember to switch to your new branch with the `git checkout` command.

**Commit Your Changes:** After making your changes, you need to "commit" them. A commit is a packaged set of alterations. Use `git add` to add your files to staging, and then `git commit -m "your message"` to commit them.

**Push Your Changes:** After committing your changes, "push" them to your forked repository on GitHub with `git push origin <branch-name>`.

**Create a Pull Request:** A Pull Request (PR) lets us know you have changes you think should be included in the main project. Go to your forked repository on GitHub and click on the 'Pull request' button.

Following these steps ensures that your contributions will be easily reviewed and potentially included in the project much faster.

Please don't get discouraged if you find these steps complex, we are here to help you throughout the process.

We hope these rules will make the Discussions section a better place for every contributor.
29 changes: 15 additions & 14 deletions _unittest/example_models/T20/test_cad.nas
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Expand Up @@ -23,7 +23,7 @@ GRID 17 -142.085-81.8469969.8416
GRID 18 338.1222.4335859436.2341
GRID 19 328.0788-91.8056 418.809
GRID 20 260.6554-89.1117 459.994
GRID 21 1574.546 -4.1-111484.805
GRID 21 1574.546 -34.1-11484.805
GRID 22 4411.665-98.6627 505.296
GRID 23 4410.392-95.7236504.7545
GRID 24 4412.102-93.0528505.4793
Expand All @@ -38,18 +38,18 @@ GRID 32 4410.434-95.7239504.6637
GRID 33 4414.683-98.9433506.4686
GRID 34 4416.393-96.2763507.1935
GRID 35 4413.413-96.0004505.9284
GRID 40 0.0 0.0 0.0
GRID 41 1.0 0.0 0.0
GRID 42 1.0 1.0 0.0
GRID 43 0.0 1.0 0.0
GRID 44 0.0 0.0 1.0
GRID 45 1.0 0.0 1.0
GRID 46 1.0 1.0 1.0
GRID 47 0.0 1.0 1.0
GRID 50 0.0 0.0 0.0
GRID 51 2.0 0.0 0.0
GRID 52 0.0 2.0 0.0
GRID 53 0.0 0.0 2.0
GRID 40 0.0 0.0 0.0
GRID 41 1.0 0.0 0.0
GRID 42 1.0 1.0 0.0
GRID 43 0.0 1.0 0.0
GRID 44 0.0 0.0 1.0
GRID 45 1.0 0.0 1.0
GRID 46 1.0 1.0 1.0
GRID 47 0.0 1.0 1.0
GRID 50 0.0 0.0 0.0
GRID 51 2.0 0.0 0.0
GRID 52 0.0 2.0 0.0
GRID 53 0.0 0.0 2.0
CTRIA3 92455 31 4 5 6
CTRIA3 92456 31 5 10 11
CTRIA3 92457 31 21 20 16
Expand All @@ -64,7 +64,8 @@ CPENTA 25229 9 27 22 28 33 29 35
CPENTA 25279 9 25 28 24 30 35 31
CPENTA 25284 9 26 27 28 34 33 35
CPENTA 25328 9 26 28 25 34 35 30
CHEXA 1 105 40 41 42 43 44 45 46 47
CHEXA 1 105 40 41 42 43 44 45
* 46 47
CTETRA 1 115 50 51 52 53

ENDDATA
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24 changes: 24 additions & 0 deletions _unittest/example_models/T20/test_cad_2.nas
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$
$ Settings :
$
$ Output format : MSC Nastran
$
$ Output : Visible
$
$
$
$
BEGIN BULK
GRID* 4 627.87512 568.96751*
* 1942.1985
GRID* 5 812.95973 486.74968*
* 1495.9564
GRID* 6 812.99916 484.24676*
* 1470.1764
CTRIA3* 75986 19 4 5
* 6


ENDDATA
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
148 changes: 148 additions & 0 deletions _unittest/example_models/TEDB/ANSYS-HSD_V1.aedb/simsetup.json
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{
"filename": null,
"open_edb_after_build": true,
"dc_settings": {
"dc_compute_inductance": false,
"dc_contact_radius": "100um",
"dc_slide_position": 1,
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"dc_min_plane_area_to_mesh": "8mil2",
"dc_min_void_area_to_mesh": "0.734mil2",
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"dc_max_num_pass": 5,
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"dc_percent_local_refinement": 0.2,
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"dc_report_config_file": "",
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"dc_export_thermal_data": true,
"dc_full_report_path": "",
"dc_icepak_temp_file": "",
"dc_import_thermal_data": false,
"dc_per_pin_res_path": "",
"dc_per_pin_use_pin_format": true,
"dc_use_loop_res_for_per_pin": true,
"dc_via_report_path": "",
"dc_source_terms_to_ground": {}
},
"ac_settings": {
"sweep_interpolating": true,
"use_q3d_for_dc": false,
"relative_error": 0.005,
"use_error_z0": false,
"percentage_error_z0": 1,
"enforce_causality": true,
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"start_freq": "0.0GHz",
"stop_freq": "20GHz",
"sweep_type": 0,
"step_freq": "0GHz",
"decade_count": 100,
"mesh_freq": "33GHz",
"max_num_passes": 30,
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"basis_order": 0,
"do_lambda_refinement": true,
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"start_azimuth": 5,
"max_arc_points": 24,
"use_arc_to_chord_error": true,
"arc_to_chord_error": "1um",
"defeature_abs_length": "1um",
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"min_void_area": "0.01mm2",
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"snap_length_threshold": "2.5um",
"min_plane_area_to_mesh": "4mil2",
"mesh_sizefactor": 0.0
},
"batch_solve_settings": {
"signal_nets": [
"PCIe_Gen4_RX0_N",
"PCIe_Gen4_RX0_P",
"PCIe_Gen4_RX1_N",
"PCIe_Gen4_RX1_P",
"PCIe_Gen4_RX2_N",
"PCIe_Gen4_RX2_P",
"PCIe_Gen4_RX3_N",
"PCIe_Gen4_RX3_P",
"PCIe_Gen4_TX0_N",
"PCIe_Gen4_TX0_CAP_N",
"PCIe_Gen4_TX0_p",
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"PCIe_Gen4_TX1_N",
"PCIe_Gen4_TX1_CAP_N",
"PCIe_Gen4_TX1_P",
"PCIe_Gen4_TX1_CAP_P",
"PCIe_Gen4_TX2_N",
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"PCIe_Gen4_TX2_CAP_P",
"PCIe_Gen4_TX3_N",
"PCIe_Gen4_TX3_CAP_N",
"PCIe_Gen4_TX3_P",
"PCIe_Gen4_TX3_CAP_P"
],
"power_nets": [
"1V0",
"2V5",
"5V",
"GND"
],
"components": [
"X1",
"U1"
],
"cutout_subdesign_type": 1,
"cutout_subdesign_expansion": 0.001,
"cutout_subdesign_round_corner": true,
"use_default_cutout": false,
"generate_excitations": true,
"add_frequency_sweep": true,
"include_only_selected_nets": false,
"generate_solder_balls": true,
"coax_solder_ball_diameter": [],
"use_default_coax_port_radial_extension": true,
"trim_reference_size": false,
"output_aedb": null,
"signal_layers_properties": {},
"coplanar_instances": [],
"signal_layer_etching_instances": [],
"etching_factor_instances": [],
"use_dielectric_extent_multiple": true,
"dielectric_extent": 0.001,
"use_airbox_horizontal_multiple": true,
"airbox_horizontal_extent": 0.1,
"use_airbox_negative_vertical_extent_multiple": true,
"airbox_negative_vertical_extent": 0.1,
"use_airbox_positive_vertical_extent_multiple": true,
"airbox_positive_vertical_extent": 0.1,
"honor_user_dielectric": false,
"truncate_airbox_at_ground": false,
"use_radiation_boundary": true,
"do_cutout_subdesign": true,
"do_pin_group": true,
"sources": []
},
"setup_name": "Pyaedt_setup",
"solver_type": 6
}
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