dts: arm: adi-cn0506-*: Update to the corresponding macb_config

Update the macb_config to the corresponding zynq_config (compatible-xlnx,zynq-gem) Signed-off-by: Alin-Tudor Sferle <[email protected]>
analogdevicesinc · Dec 19, 2023 · 2287759 · 2287759
1 parent 427c94e
commit 2287759
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Showing 3 changed files with 6 additions and 4 deletions.
diff --git a/arch/arm/boot/dts/adi-cn0506-mii.dtsi b/arch/arm/boot/dts/adi-cn0506-mii.dtsi
@@ -7,7 +7,7 @@
 	 * PHY after matching MAC link caps with PHY link caps,
 	 * even though, the design won't be able to actually support it
 	 */
-	compatible = "cdns,macb";
+	compatible = "xlnx,zynq-gem";
 
 	ethernet_gem0_phy1: ethernet-phy@1 {
 		reg = <1>;
@@ -23,7 +23,7 @@
 	 * PHY after matching MAC link caps with PHY link caps,
 	 * even though, the design won't be able to actually support it
 	 */
-	compatible = "cdns,macb";
+	compatible = "xlnx,zynq-gem";
 
 	ethernet_gem1_phy2: ethernet-phy@2 {
 		reg = <2>;

diff --git a/arch/arm/boot/dts/adi-cn0506-rgmii.dtsi b/arch/arm/boot/dts/adi-cn0506-rgmii.dtsi
@@ -2,6 +2,7 @@
 	status = "okay";
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethernet_gem0_phy1>;
+	compatible = "xlnx,zynq-gem";
 
 	ethernet_gem0_phy1: ethernet-phy@1 {
 		reg = <1>;
@@ -18,6 +19,7 @@
 	status = "okay";
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethernet_gem1_phy2>;
+	compatible = "xlnx,zynq-gem";
 
 	ethernet_gem1_phy2: ethernet-phy@2 {
 		reg = <2>;

diff --git a/arch/arm/boot/dts/adi-cn0506-rmii.dtsi b/arch/arm/boot/dts/adi-cn0506-rmii.dtsi
@@ -9,7 +9,7 @@
 	 * PHY after matching MAC link caps with PHY link caps,
 	 * even though, the design won't be able to actually support it
 	 */
-	compatible = "cdns,macb";
+	compatible = "xlnx,zynq-gem";
 
 	clocks = <&clkc 30>, <&fmc_mii_clk1>, <&clkc 13>;
 	clock-names = "pclk", "hclk", "tx_clk";
@@ -31,7 +31,7 @@
 	 * PHY after matching MAC link caps with PHY link caps,
 	 * even though, the design won't be able to actually support it
 	 */
-	compatible = "cdns,macb";
+	compatible = "xlnx,zynq-gem";
 
 	clocks = <&clkc 31>, <&fmc_mii_clk2>, <&clkc 14>;
 	clock-names = "pclk", "hclk", "tx_clk";