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Fix dma_enable incorrect address
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The address of the dma enable register was incorrect
which cause unaligned access.
On newer rpi os this causes SIGBUS error.

I havent noticed this since all the dma channels are enabled by default
so whem I tried to enable them and failed
(quietly) they were already enabled.

Also fixed incorrect non volatile access to this register.
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alloncm committed Apr 13, 2023
1 parent 6e7f81c commit a776184
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Showing 3 changed files with 10 additions and 9 deletions.
8 changes: 4 additions & 4 deletions Cargo.lock

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2 changes: 1 addition & 1 deletion Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,6 @@ members = [
]

[workspace.package]
version = "3.0.1"
version = "3.0.2"
authors = ["alloncm <[email protected]>"]
rust-version = "1.65" # cause of let else feature
9 changes: 5 additions & 4 deletions gb/src/rpi_gpio/dma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -195,8 +195,8 @@ pub struct DmaSpiTransferer{
}

impl DmaSpiTransferer{
const BCM_DMA0_OFFSET:usize = 0x7_000;
const BCM_DMA_ENABLE_REGISTER_OFFSET:usize = Self::BCM_DMA0_OFFSET + 0xFF;
const BCM_DMA0_OFFSET:usize = 0x7000;
const BCM_DMA_ENABLE_REGISTER_OFFSET:usize = Self::BCM_DMA0_OFFSET + 0xFF0;
const DMA_CHANNEL_REGISTERS_SIZE:usize = 0x100;

const DMA_CS_RESET:u32 = 1 << 31;
Expand Down Expand Up @@ -255,8 +255,9 @@ impl DmaSpiTransferer{
write_volatile(ptr, spi_enable_dma_flag); // this int enable spi with dma
write_volatile(ptr.add(1), Self::DMA_CS_ACTIVE | Self::DMA_CS_END); // this int starts the dma (set active and wrtie to end to reset it)

// enable the rx & tx dma channels
write_volatile(dma_enable_register, *dma_enable_register | 1 << Self::TX_CHANNEL_NUMBER | 1<< Self::RX_CHANNEL_NUMBER);
// enable the rx & tx dma channels, on most of the cases this just to make sure they are enabled since they are enabled by default
let enable_value = read_volatile(dma_enable_register);
write_volatile(dma_enable_register, enable_value | 1 << Self::TX_CHANNEL_NUMBER | 1 << Self::RX_CHANNEL_NUMBER);

//reset the dma channels
(*tx_registers).write_cs(Self::DMA_CS_RESET);
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