From: 14 May 2024 - To: 11 January 2025
Total Time: 249 hrs 2 mins
Rust 95 hrs 13 mins >>>>>>>>>---------------- 37.78 %
C 35 hrs 54 mins >>>>--------------------- 14.25 %
Go 30 hrs 7 mins >>>---------------------- 11.95 %
C++ 23 hrs 28 mins >>----------------------- 09.31 %
Python 16 hrs 7 mins >>----------------------- 06.40 %
Makefile 6 hrs 37 mins >------------------------ 02.63 %
SystemVerilog 6 hrs 27 mins >------------------------ 02.56 %
Text 5 hrs 48 mins >------------------------ 02.30 %
HTML 4 hrs 37 mins ------------------------- 01.83 %
PHP 4 hrs 30 mins ------------------------- 01.79 %
🌴
On Something
Student of Computer Engineering at Cin-UFPE - Recife, PE
-
Cin - UFPE
- Pernambuco, Brazil
-
08:50
(UTC -03:00) - cin.ufpe.br/~lgpss
- @luizgust132
- https://lattes.cnpq.br/3310202128635156
- in/luiz-gustavo-a545b8317
- https://rxresu.me/zed201/infos
Highlights
- Pro
Pinned Loading
-
-
Projeto_IH_RISC-V
Projeto_IH_RISC-V PublicForked from nathaliafab/Projeto_IH_RISC-V
Arquivos base para o projeto da disciplina Infraestrutura de Hardware (IF674) no CIn-UFPE.
SystemVerilog
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.