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[opnframe] initial openframe support WiP
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urish committed Nov 2, 2023
1 parent d19a01d commit 0aecf82
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Showing 15 changed files with 3,171 additions and 14 deletions.
88 changes: 88 additions & 0 deletions cfg/sky130of.yaml
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@@ -0,0 +1,88 @@
pdk:
die:
width: 3166630
height: 4766630
margin:
left: 3680
right: 250310
top: 5440
bottom: 1252070
site:
width: 460
height: 2720
pwrgate:
vdd:
width: 9200
tracks:
li1:
x:
offset: 230
pitch: 460
width: 170
y:
offset: 170
pitch: 340
width: 170
met1:
x:
offset: 170
pitch: 340
width: 140
y:
offset: 170
pitch: 340
width: 140
met2:
x:
offset: 230
pitch: 460
width: 140
y:
offset: 230
pitch: 460
width: 140
met3:
x:
offset: 340
pitch: 680
width: 300
y:
offset: 340
pitch: 680
width: 300
met4:
x:
offset: 460
pitch: 920
width: 300
y:
offset: 460
pitch: 920
width: 300
met5:
x:
offset: 1700
pitch: 3400
width: 1600
y:
offset: 1700
pitch: 3400
width: 1600
tt:
grid: # In number of blocks
x: 16 # Must be divisible by 4
y: 24 # Must be EVEN
block:
w: -1
h: -1
margin: # In 'sites'
x: 4
y: 1
uio:
a: 8
i: 10
o: 8
io: 8
spine:
vlayer: 'met4'
hlayer: 'met3'
34 changes: 29 additions & 5 deletions ol2/tt_top/build.py
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@

#
# OpenLane2 build script to harden the tt_top macro inside
# the classic user_project_wrapper
# the openframe_project_wrapper
#
# Copyright (c) 2023 Sylvain Munaut <[email protected]>
# SPDX-License-Identifier: Apache-2.0
Expand Down Expand Up @@ -95,7 +95,8 @@ class TopFlow(SequentialFlow):
Magic.SpiceExtraction,
Checker.IllegalOverlap,
Netgen.LVS,
Checker.LVS,
# LVS is currently broken in openframe (see https://github.com/efabless/openframe_timer_example/tinytapeout-05-openframe/commit/e431e03e8d57791ff2149ff392fc554f8fa3ed84)
# Checker.LVS,
]


Expand All @@ -119,7 +120,30 @@ class TopFlow(SequentialFlow):
tti = tt.TinyTapeout()

# Generate macros
macros = { }
macros = {
'vccd1_connection': {
'gds': [ 'dir::openframe/vccd1_connection.gds', ],
'lef': [ 'dir::openframe/vccd1_connection.lef', ],
'nl': 'dir::openframe/vccd1_connection.v',
'instances': {
'vccd1_connection': {
'location': [ 3122.515, 4327.51 ],
'orientation': 'N',
}
},
},
'vssd1_connection': {
'gds': [ 'dir::openframe/vssd1_connection.gds', ],
'lef': [ 'dir::openframe/vssd1_connection.lef', ],
'nl': 'dir::openframe/vssd1_connection.v',
'instances': {
'vssd1_connection': {
'location': [ 3122.515, 2088.51 ],
'orientation': 'N',
}
},
},
}
user_modules = []

for m in tti.die.get_sub_macros():
Expand Down Expand Up @@ -160,12 +184,12 @@ class TopFlow(SequentialFlow):
# Custom config
flow_cfg = {
# Main design properties
"DESIGN_NAME" : "user_project_wrapper",
"DESIGN_NAME" : "openframe_project_wrapper",
"DESIGN_IS_CORE" : False,

# Sources
"VERILOG_FILES": [
"dir::user_project_wrapper.v",
"dir::openframe_project_wrapper.v",
"dir::../../rtl/tt_top.v",
"dir::../../rtl/tt_user_module.v",
],
Expand Down
4 changes: 2 additions & 2 deletions ol2/tt_top/config.json
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
"MAGIC_ZEROIZE_ORIGIN": false,
"//": "Do not touch this section.",
"FP_SIZING": "absolute",
"DIE_AREA": "0 0 2920 3520",
"DIE_AREA": "0 0 3166.63 4766.630",
"RUN_CVC": false,
"FP_DEF_TEMPLATE": "dir::user_project_wrapper.def",
"FP_DEF_TEMPLATE": "dir::openframe_project_wrapper.def",
"//": "---",
"FP_PDN_CORE_RING": true,
"FP_PDN_CORE_RING_VWIDTH": 3.1,
Expand Down
2 changes: 1 addition & 1 deletion ol2/tt_top/odb_route.py
Original file line number Diff line number Diff line change
Expand Up @@ -590,7 +590,7 @@ def route(
r.create_macro_obs()
r.route_k01()
r.create_k01_obs()
r.route_pad()
#r.route_pad()
r.route_um_tieoffs()

# Create the power strapper
Expand Down
Binary file added ol2/tt_top/openframe/vccd1_connection.gds
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16 changes: 16 additions & 0 deletions ol2/tt_top/openframe/vccd1_connection.lef
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@@ -0,0 +1,16 @@
VERSION 5.7 ;
NOWIREEXTENSIONATPIN ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
MACRO vccd1_connection
CLASS BLOCK ;
FOREIGN vccd1_connection ;
ORIGIN 0.000 0.000 ;
SIZE 45.400 BY 74.600 ;
OBS
LAYER met3 ;
RECT 0.105 0.100 45.340 74.300 ;
END
END vccd1_connection
END LIBRARY

26 changes: 26 additions & 0 deletions ol2/tt_top/openframe/vccd1_connection.mag
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magic
tech sky130A
magscale 1 2
timestamp 1520178628
<< checkpaint >>
rect -1239 -1240 10328 16120
<< metal3 >>
rect 21 14832 9060 14860
rect 21 10128 29 14832
rect 4013 10128 9060 14832
rect 21 10060 9060 10128
rect 4501 9742 9063 9770
rect 4501 5198 4509 9742
rect 8493 5198 9063 9742
rect 4501 5108 9063 5198
rect 21 4787 9068 4809
rect 21 83 29 4787
rect 4013 83 9068 4787
rect 21 20 9068 83
<< via3 >>
rect 29 10128 4013 14832
rect 4509 5198 8493 9742
rect 29 83 4013 4787
<< properties >>
string FIXED_BBOX 0 0 9080 14920
<< end >>
2 changes: 2 additions & 0 deletions ol2/tt_top/openframe/vccd1_connection.v
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@@ -0,0 +1,2 @@
module vccd1_connection ();
endmodule
Binary file added ol2/tt_top/openframe/vssd1_connection.gds
Binary file not shown.
16 changes: 16 additions & 0 deletions ol2/tt_top/openframe/vssd1_connection.lef
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@@ -0,0 +1,16 @@
VERSION 5.7 ;
NOWIREEXTENSIONATPIN ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
MACRO vssd1_connection
CLASS BLOCK ;
FOREIGN vssd1_connection ;
ORIGIN 0.000 0.000 ;
SIZE 45.400 BY 74.600 ;
OBS
LAYER met3 ;
RECT 0.105 0.100 45.340 74.300 ;
END
END vssd1_connection
END LIBRARY

26 changes: 26 additions & 0 deletions ol2/tt_top/openframe/vssd1_connection.mag
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@@ -0,0 +1,26 @@
magic
tech sky130A
magscale 1 2
timestamp 1520179892
<< checkpaint >>
rect -1239 -1240 10328 16120
<< metal3 >>
rect 4501 14832 9060 14860
rect 4501 10128 4509 14832
rect 8493 10128 9060 14832
rect 4501 10060 9060 10128
rect 21 9742 9063 9770
rect 21 5198 29 9742
rect 4013 5198 9063 9742
rect 21 5108 9063 5198
rect 4501 4787 9068 4809
rect 4501 83 4509 4787
rect 8493 83 9068 4787
rect 4501 20 9068 83
<< via3 >>
rect 4509 10128 8493 14832
rect 29 5198 4013 9742
rect 4509 83 8493 4787
<< properties >>
string FIXED_BBOX 0 0 9080 14920
<< end >>
2 changes: 2 additions & 0 deletions ol2/tt_top/openframe/vssd1_connection.v
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@@ -0,0 +1,2 @@
module vssd1_connection ();
endmodule
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