Releases: TexasInstruments/ti-pmic-lld
REL.PMIC.TPS65385XX.00.01.00
v0.1.0 PMIC Low-Level Driver release for Green Hornet/TPS65385xx.
Initial release, includes support for:
- PMICDRV-258: Add IO and CRC Support for Green Hornet
- PMICDRV-259: Add IRQ Support for Green Hornet
- PMICDRV-260: Add Register Lock/Unlock Support for Green Hornet
Full Changelog: BASE.PMIC.TPS65385XX...REL.PMIC.TPS65385XX.00.01.00
REL.PMIC.TPS65036X.00.01.00
v0.1.0 PMIC Low-Level Driver release for Derby/TPS65036x.
Initial release, includes support for:
- ESM
- IRQ
- Power module controls
- Watchdog
- Other core features such as register lock/unlock and communications CRC.
Full Changelog: BASE.PMIC.TPS65036X...REL.PMIC.TPS65036X.00.01.00
REL.PMIC.LP8772X.00.11.00
v0.11.0 PMIC Low-Level Driver release for Coach/LP8772x.
PMICDRV-209: Implement support for FSM_COMMAND_REG
The FSM_COMMAND_REG allows the MCU to request PMIC FSM state machine transitions, giving the ability to reset the device (among other things).
PMICDRV-180: Implement support for config register CRC calculation
Certain registers on this device are monitored by a constant CRC calculation to ensure no corruption has occurred. This change adds APIs to allow users to update and verify this CRC calculation when changing registers which require it.
PMICDRV-210: Add support for pseudo-nINT
In systems where the nINT line is not connected to the processor, an alternate method of detecting PMIC interrupt events must be used. As WD Q&A servicing is a relatively frequent Processor<->PMIC interaction, this is a good time to do so.
To facilitate this, there is a bit in the WD_QA_CNT register which indicates whether an interrupt is pending or not, and this can be leveraged to detect interrupt events.
This change adds a new user defined callback function to the Pmic_CoreCfg_t structure which allows users to define a callback function to be called when this interrupt bit is set.
PMICDRV-174: Support Power resource APIs
Adds ability to control and get information related to PMIC power resources through the following additional APIs:
Pmic_pwr{Set,Get}ResourceEnablePmic_pwr{Set,Get}ResourceCfgPmic_pwr{Set,Get}ResourceCfgsPmic_pwr{Set,Get}SequenceCfgPmic_pwr{Set,Get}SequenceCfgs
Full Changelog: REL.PMIC.LP8772X.00.10.00...REL.PMIC.LP8772X.00.11.00
REL.PMIC.LP8772X.00.10.00
v0.10.0 PMIC Low-Level Driver release for Coach/LP8772x.
PMICDRV-173: Support IRQ / Error Status
Adds support for the IRQ module which allows for configuration (masking/unmasking), reading, and clearing of interrupt sources on LP8772X PMIC.
PMICDRV-184: Change what data is sent to pFnPmicCommIo{Rx,Wr}
The prior implementation of Pmic_io{Tx,Rx}Byte() passed the entire I2C buffer that is used to calculate the I2C CRC into the user provided functions pFnPmicCommIo{Rd,Wr}().
Generally I2C driver functions are either designed so that they expect to receive register subaddress and then data as two separate parameters, or designed so that they don't have knowledge of subaddresses and the user embeds those in the single data parameter.
The updated implementation provides all necessary components as separate
arguments:
- I2C device address -> handle->slaveAddress
- Register subaddress -> uint16_t regAddr parameter
- Data packet -> uint8_t *{rx,tx}Data parameter
PMICDRV-183: Potential PMIC_ST_INV_HANDLE error when Pmic_CoreHandle_t uses uninit memory
If the Pmic_CoreHandle_t type is created in an uninitialized memory region the individual fields may not start out as 0. For most fields this is okay as the fields are assigned using =, but the drvInitStatus field is initialized using |= so will not end up with the expected value unless it is explicitly initialized to 0.
This change ensures that this field starts out as DRV_INIT_UNINIT.
PMICDRV-185: Add versions of Pmic_io{Tx,Rx}Byte which handle critical section
Add two new functions to the IO module which are duplicates of Pmic_ioTxByte and Pmic_ioRxByte, but obtain and release critical sections before/after performing the write/read, respectively.
These functions should be preferred for one-off reads and writes which are not part of a larger sequence of sequential transactions.
Full Changelog: REL.PMIC.LP8772X.00.09.00...REL.PMIC.LP8772X.00.10.00
REL.PMIC.LP8772X.00.09.00
v0.9.0 PMIC Low-Level Driver release for Coach/LP8772x.
This release addresses the following issues.
PMICDRV-176: Driver init is blocked due to expecting wrong comms type
The driver device configuration init function incorrectly asserted that the user is configuring the handle for SPI, when it should be asserting that the configuration is for I2C_SINGLE mode. This part does not support SPI or dual I2C.
PMICDRV-177: I2C slave address not set in driver handle
When initializing the PMIC driver handle the slaveAddr property is expected to be provided by the config, but the init function was never assigning this value to the handle, so it could not be used for the I2C comms implementation.
PMICDRV-178: Allow crcEnable in driver init to control comms CRC
In the previous implementation the crcEnable field passed to Pmic_init() was only used to indicate to the driver whether CRC should be calculated when performing I/O, but had no effect on whether CRC was enabled in the HW. It was only used to match the configuration of the HW.
In this implementation, this bit now controls whether comms CRC is enabled or not, allowing users to dynamically control CRC enablement. Additionally, 3 new APIs are added to allow users to control CRC outside of the context of driver initialization, these functions are:
Pmic_ioGetCrcEnableState(Pmic_CoreHandle_t *, bool *)Pmic_ioCrcEnableControl(Pmic_CoreHandle_t *, bool)Pmic_ioCrcEnable(Pmic_CoreHandle_t *)Pmic_ioCrcDisable(Pmic_CoreHandle_t *)
PMICDRV-179: Add ability to control CONFIG_CRC
Add support for controlling the CONFIG_CRC register protection mechanism. A new property (configCrcEnable) is added to the Pmic_CoreCfg_t and Pmic_CoreHandle_t which controls this functionality. Additionally, new APIs are added to allow users to control this feature outside of initialization contexts:
Pmic_configCrcEnable(Pmic_CoreHandle_t *, bool)Pmic_configCrcDisable(Pmic_CoreHandle_t *)
Full Changelog: REL.PMIC.LP8772X.00.08.00...REL.PMIC.LP8772X.00.09.00
REL.PMIC.LP8772X.00.08.00
v0.8.0 PMIC Low-Level Driver release for Coach/LP8772x.
Supports the following features:
- Basic I/O communications (w/ CRC support)
- Register lock and unlock
- Scratchpad register read and write
- Watchdog configuration and control
Full Changelog: BASE.PMIC.LP8772X...REL.PMIC.LP8772X.00.08.00
REL.PMIC.TPS6522X.00.10.01
v0.10.1 PMIC Low-Level Driver release for Burton/TPS6522x.
This release addresses the following:
- PMICDRV-147: Pmic_ADCGetStatus() does not return any data
Full Changelog: REL.PMIC.TPS6522X.00.10.00...REL.PMIC.TPS6522X.00.10.01
REL.PMIC.TPS6522X.00.10.00
v0.10.0 PMIC Low-Level Driver release for Burton/TPS6522x.
This release addresses the following:
- PMICDRV-108: Fix incorrect pass-by-value of Pmic_WdgCfg_t, resulting in sub-optimal performance.
- Add support for Communications CRC
Full Changelog: REL.PMIC.TPS6522X.00.09.00...REL.PMIC.TPS6522X.00.10.00
REL.PMIC.TPS65386X.00.09.00
v0.9.0 PMIC Low-Level Driver release for Blackbird/TPS65386x
This release is a first pass at addressing fundamental issues with the v0.8.0 release. As a result, many functional modules have been removed until further review and rework is complete. This release includes support for the following:
- SPI Communication (Read and Write) with CRC, including APIs you can use to perform arbitrary register read/write with the PMIC (CRC backed), to allow direct user control of features not yet covered by the driver.
- Control and configuration of all watchdog features, including calculation and response APIs for Q&A watchdog.
- Register lock and unlock control.
Full Changelog: REL.PMIC.TPS65386X.00.08.00...REL.PMIC.TPS65386X.00.09.00
REL.PMIC.TPS6522X.00.09.00
v0.9.0 PMIC Low-Level Driver release for Burton/TPS6522x.
Full Changelog: BASE.PMIC.TPS6522X...REL.PMIC.TPS6522X.00.09.00