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@vtrip97 vtrip97 released this 17 Sep 06:57
· 43 commits to rel_10_00 since this release

New in this Release

Description Notes
Support for higher precision 16-bit sigmoid on EVM This requires a firmware update to be utilized (10_00_05_00)
Support for custom element type for output of the input data convert layer This requires a firmware update to be utilized (10_00_05_00)

Fixed in this Release

ID Description Affected Platforms
TIDL-4839 Incorrect output datatype to TIDL_DataConvertLayer when "add_data_convert_ops" flag is enabled and the ONNX/TFLITE graph has multiple outputs with different output datatypes All except AM62
TIDL-4671 Fused combination for layernorm might not get correctly identified resulting in multiple layers getting denied All except AM62
TIDL-4829 16-bit Sigmoid kernel results in poor accuracy All except AM62
TIDL-4841 Gather Layer input may come in DDR resulting into performance degradation on EVM All except AM62
TIDL-4716 TIDL creation call results in erroneously allocating more DDR shared memory for input/output tensors than required All except AM62
TIDL-4684 Depthwise separable convolution layer with 2xWxH*elementSize > 224KB (for AM62A/J722S) or 448KB (for all other devices) may result in wrong output on target All except AM62
TIDL-4697 Depthwise Separable Convolution Layer with large Input Width may give wrong output on Target All except AM62
TIDL-4696 Using compilation option "advanced_options:inference_mode" = 1 gives following error : "High Throughtput Inference Mode is not supported when partial batch is detected in graph" when the batched model has Transpose Layer All except AM62
TIDL-4681 TIDL Subgraphs incorrectly have outputs with the same name All except AM62
TIDL-4825 Feature to schedule TIDL networks based on user specified priority may result in error with status (-1128) on multiple runs of create and process callbacks All except AM62
TIDL-4827 Transpose of type (0,2,3,1) & (0,3,1,2) are split into layout data convert & DMA transposes in TIDL All except AM62
TIDL-4680 Feature to schedule TIDL networks based on user specified priority may result in hang/c7x exception on target All except AM62
TIDL-4687 Layernorm operator (ONNX Opset-17) produces incorrect results All except AM62
TIDL-4702 Model with multiple subgraphs fails in inference when calibration_frames>1 All except AM62
TIDL-4695 Reshape Layer may give wrong output on target if size of input buffer is not same as size of its output buffer All except AM62
TIDL-4694 Model compilation hits a segmentation fault when logFileName option is used but the file is not accessible All except AM62
TIDL-4669 Matmul with high dimension input may give wrong output on Target All except AM62
TIDL-4691 Model compilation via TIDL-RT hits a Segmentation fault while using the logFileName option All except AM62