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Merge pull request #29 from StanfordAccelerate/yuchen-jeffrey-changes
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update jeffrey and yuchen's bios; add new group photo at INDO
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yuchen-mei authored Apr 18, 2024
2 parents 6b0c832 + dd7bd47 commit bff642e
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4 changes: 4 additions & 0 deletions _pages/group-photos.md
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<td style="width:50%"><img src="/assets/images/group_photo_apr_14_2024.jpg" width="800" align="center" style="padding-right: 30px; padding-bottom: 20px;"></td>
<td>Group photo from INDO Restaurant & Lounge on April 14, 2024. From left to right: Sai Gautham Ravipati, Po-Han Chen, Yuchen Mei, Kai Bartolone, Suresh Nambi, Jeffrey Yu, Zhouhua Xie, Kathleen Feng, Kartik Prabhu, Kalhan Koul, Michael Oduoza, Bo Wun Cheng, Jackson Melchert, and Priyanka Raina.</td>
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<td style="width:50%"><img src="/assets/images/group_photo_oct_8_2023.jpg" width="800" align="center" style="padding-right: 30px; padding-bottom: 20px;"></td>
<td>Group photo from Alpine Inn on October 8, 2023. From left to right: Jackson Melchert, Kalhan Koul, Kathleen Feng, Kai Bartolone, Bo Wun Cheng, Jeffery Yu, Po-Han Chen, Kartik Prabhu, Michael Oduoza, Yuchen Mei, Priyanka Raina, and Calib Terrill.</td>
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36 changes: 18 additions & 18 deletions index.md
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<b>Research:</b> I am generally interested in designing hardware accelerators. Most of my previous works were related to computational photography algorithms such as digital refocusing. Currently, I am focusing on analyzing and designing architecture of CGRAs to create high-performance, energy-efficient, and reconfigurable computing platforms.
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<td style="width:18%"><img src="/assets/images/jeffrey.jpg" width="250" align="left"></td>
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<b>Jeffrey Yu</b><br>
<b>Email:</b> jeffreyy AT stanford DOT edu<br>
<b>About:</b> Jeffrey is an EE Ph.D. student at Stanford University supervised by Prof. Priyanka Raina. He received his B.S. degree in Computer Engineering from UC San Diego in 2021.<br>
<b>Research:</b> His research focuses on edge device training, efficient ML algorithms, and deep neural network quantization. In particular, he is working on low-precision multi-modal AI and building an hardware accelerator for mix-reality workloads.<br>
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<td style="width:18%"><img src="/assets/images/yuchen.jpg" width="250" align="left"></td>
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<b>Yuchen Mei</b><br>
<b>Email:</b> yuchenm AT stanford DOT edu, <a href="https://www.linkedin.com/in/yuchen-mei98/">Webpage</a><br>
<b>About:</b> Yuchen Mei is an EE Ph.D. student at Stanford University supervised by Prof. Priyanka Raina. He received his B.S. degree in Electronic Information Science and Technology from Nanjing University (China) in 2021 and M.S. in Electrical Engineering from Stanford University in 2023.<br>
<b>Research:</b> His current research focuses on application mapping and optimization for domain-specific accelerators, with a particular interest in auto-scheduling for compute-intensive applications, such as image processing and deep learning. Before joining Stanford, he worked on 3D-CNN optimization and hardware security.
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## Masters Students
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<td style="width:18%"><img src="/assets/images/jeffrey.jpg" width="250" align="left"></td>
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<b>Jeffrey Yu</b><br>
<b>Email:</b> jeffreyy AT stanford DOT edu<br>
<b>About:</b> Jeffrey is an EE Master student at Stanford University working in Prof. Priyanka Raina’s research group. He received his B.S. degree in Computer Engineering from UC San Diego in 2021.<br>
<b>Research:</b> My research focuses on efficient DNN inference and training using quantization and new number systems. I also work on the mapping DNN operations to the accelerator and verification of RTL and SoC.<br>
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<td style="width:18%"><img src="/assets/images/yuchen.jpg" width="250" align="left"></td>
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<b>Yuchen Mei</b><br>
<b>Email:</b> yuchenm AT stanford DOT edu, <a href="https://www.linkedin.com/in/yuchen-mei98/">Webpage</a><br>
<b>About:</b> Yuchen Mei is an EE M.S. student at Stanford University supervised by Prof. Priyanka Raina. He received a B.S. degree in Electronic Information Science and Technology from Nanjing University (China) in 2021. Before joining Stanford, he was a research assistant at Nanjing University where he worked on 3D-CNN optimization and hardware security.<br>
<b>Research:</b> Currently, my research focuses on how to improve the frequency of image processing and machine learning applications running on CGRAs. I am involved in the development of software pipelining techniques and the design space exploration of the CGRA array and interconnection system. I am generally interested in chip design, domain-specific accelerators, and design automation.
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<td style="width:18%"><img src="/assets/images/brianna.jpeg" width="250" align="left"></td>
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