Merge pull request #1779 from StanfordAHA/aha_merge

Aha merge
StanfordAHA · Sep 25, 2023 · b7f22d2 · b7f22d2
2 parents 5ecdb0a + 09e311a
commit b7f22d2
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Showing 4 changed files with 4 additions and 4 deletions.
diff --git a/aha/util/regress.py b/aha/util/regress.py
@@ -232,7 +232,7 @@ def dispatch(args, extra_args=None):
             "mat_mattransmul",
             # Turned off until SUB ordering fixed in mapping
             # 'mat_residual',
-            "mat_sddmm",
+            #"mat_sddmm",
             "mat_vecmul_ij",
             "matmul_ijk",
             "matmul_jik",

diff --git a/clockwork b/clockwork
diff --git a/garnet b/garnet
diff --git a/lake b/lake
+24,734 −0		aha_garnet_design_new/resnet5_x_docker/resnet5_x_docker.json
+29,917 −0		aha_garnet_design_new/resnet5_x_unroll_mic/resnet5_x_unroll_mic.json
+8,727 −0		aha_garnet_design_new/resnet_1x1/resnet_1x1.json
+35,970 −0		aha_garnet_design_pond/fsrcnn_reorder/fsrcnn_reorder.json
+37,994 −0		aha_garnet_design_pond/fsrcnn_shared/fsrcnn_shared.json
+47,554 −0		aha_garnet_design_pond/resnet16x16_mic_moc/resnet16x16_mic_moc.json
+39 −0		app.cpp
+4 −0		app.h
+572 −214		build_set_test.cpp
+108 −0		cascade_coarse_compute.h
+393 −93		coreir_backend.cpp
+3 −0		coreir_backend.h
+333 −0		coreir_compute/cascade_coarse_compute.json
+3,326 −0		coreir_compute/fsrcnn_compute.json
+3,326 −0		coreir_compute/fsrcnn_reorder_compute.json
+3,326 −0		coreir_compute/fsrcnn_reordered_compute.json
+3,326 −0		coreir_compute/fsrcnn_shared_compute.json
+139 −0		coreir_compute/gemm_compute.json
+139 −0		coreir_compute/gemm_reorder_compute.json
+146 −0		coreir_compute/gpyr_default_compute.json
+146 −0		coreir_compute/gpyr_tagged_compute.json
+173 −0		coreir_compute/gpyr_unroll_compute.json
+173 −0		coreir_compute/gpyr_unroll_default_compute.json
+134 −0		coreir_compute/maxpool_layer_compute.json
+3,888 −0		coreir_compute/resnet16x16_compute.json
+3,888 −0		coreir_compute/resnet16x16_mic_compute.json
+3,888 −0		coreir_compute/resnet16x16_mic_moc_compute.json
+102 −0		coreir_compute/resnet_mic_moc_compute.json
+23 −0		example_progs.h
+118 −0		example_progs/cascade_tagged_memory.cpp
+1 −1		example_progs/conv_1_3.cpp
+10 −10		example_progs/conv_3_3.cpp
+1,003 −0		example_progs/fsrcnn.cpp
+2,003 −0		example_progs/fsrcnn_reorder.cpp
+187 −0		example_progs/gemm_memory.cpp
+388 −0		example_progs/gpyr_tagged_memory.cpp
+112 −0		example_progs/maxpool_layer_memory.cpp
+3,008 −0		example_progs/resnet16x16.cpp
+7 −7		example_progs/resnet_1x1.cpp
+126 −0		example_progs/resnet_mic_moc.cpp
+1,399 −0		fsrcnn_compute.h
+1,399 −0		fsrcnn_reorder_compute.h
+72 −0		gemm_compute.h
+64 −0		gpyr_compute.h
+85 −0		gpyr_unroll_compute.h
+16 −2		isl_utils.cpp
+2 −0		isl_utils.h
+72 −0		maxpool_layer_compute.h
+2 −0		misc/aha_flow_setup.sh
+24 −0		options.cpp
+136 −6		options.h
+156 −44		prog.cpp
+127 −9		prog.h
+1,549 −0		resnet16x16_compute.h
+66 −0		resnet_mic_moc_compute.h
+426 −9		resource.h
+38 −7		ubuffer.cpp
+8 −4		ubuffer.h
+52 −54		.buildkite/pipelines/pmg.yml
+1 −0		.buildkite/setup.sh
+1 −0		bin/check_docker.sh
+ −		bin/ref/amber-4x2.v.gz
+ −		bin/ref/onyx-4x2.v.gz
+13 −7		bin/requirements_check.sh
+143 −0		bin/rtl-goldcheck.sh
+31 −0		bin/rtl-goldcompare.sh
+70 −0		bin/rtl-goldfetch.sh
+38 −39		mflowgen/Tile_MemCore/construct.py
+32 −32		mflowgen/Tile_PE/construct.py
+19 −16		mflowgen/bin/setup-buildkite.sh
+1 −1		mflowgen/common/cadence-innovus-genlib/scripts/generate-lib.tcl
+0 −23		mflowgen/common/power-domains-amber/README
+0 −36		mflowgen/common/power-domains-amber/configure.yml
+0 −11		mflowgen/common/power-domains-amber/outputs/add-aon-tie-cells.tcl
+0 −88		mflowgen/common/power-domains-amber/outputs/add-endcaps-welltaps-setup.tcl
+0 −155		mflowgen/common/power-domains-amber/outputs/add-power-switches.tcl
+0 −57		mflowgen/common/power-domains-amber/outputs/check-clamp-logic-structure.tcl
+0 −12		mflowgen/common/power-domains-amber/outputs/conn-aon-cells-vdd.tcl
+0 −21		mflowgen/common/power-domains-amber/outputs/dc-dont-use-constraints.tcl
+0 −90		mflowgen/common/power-domains-amber/outputs/designer-interface.tcl
+0 −25		mflowgen/common/power-domains-amber/outputs/dont-touch-constraints.tcl
+0 −3		mflowgen/common/power-domains-amber/outputs/mem-constraints-2.tcl
+0 −25		mflowgen/common/power-domains-amber/outputs/mem-constraints.tcl
+0 −11		mflowgen/common/power-domains-amber/outputs/mem-load-upf.tcl
+0 −93		mflowgen/common/power-domains-amber/outputs/mem-pd-params.tcl
+0 −11		mflowgen/common/power-domains-amber/outputs/mem-power-switches-setup.tcl
+0 −18		mflowgen/common/power-domains-amber/outputs/pd-add-endcaps-welltaps.tcl
+0 −35		mflowgen/common/power-domains-amber/outputs/pd-aon-floorplan.tcl
+0 −28		mflowgen/common/power-domains-amber/outputs/pd-generate-lvs-netlist.tcl
+0 −23		mflowgen/common/power-domains-amber/outputs/pd-globalnetconnect.tcl
+0 −29		mflowgen/common/power-domains-amber/outputs/pd-mem-floorplan.tcl
+0 −3		mflowgen/common/power-domains-amber/outputs/pe-constraints-2.tcl
+0 −20		mflowgen/common/power-domains-amber/outputs/pe-constraints.tcl
+0 −11		mflowgen/common/power-domains-amber/outputs/pe-load-upf.tcl
+0 −101		mflowgen/common/power-domains-amber/outputs/pe-pd-params.tcl
+0 −24		mflowgen/common/power-domains-amber/outputs/place-dont-use-constraints.tcl
+0 −49		mflowgen/common/power-domains-amber/outputs/upf_Tile_Mem.tcl
+0 −49		mflowgen/common/power-domains-amber/outputs/upf_Tile_MemCore.tcl
+0 −52		mflowgen/common/power-domains-amber/outputs/upf_Tile_PE.tcl
+1 −0		mflowgen/common/power-domains/configure.yml
+7 −3		mflowgen/common/power-domains/outputs/add-endcaps-welltaps-setup.tcl
+78 −0		mflowgen/common/power-domains/outputs/add-power-switches.tcl
+14 −3		mflowgen/common/power-domains/outputs/check-pdcr-address.sh
+3 −5		mflowgen/common/power-domains/outputs/mem-pd-params.tcl
+1 −0		mflowgen/common/power-domains/outputs/pd-add-endcaps-welltaps.tcl
+2 −1		mflowgen/common/power-domains/outputs/pd-globalnetconnect.tcl
+9 −2		mflowgen/common/power-domains/outputs/pe-pd-params.tcl
+12 −9		mflowgen/common/power-domains/outputs/place-dont-use-constraints.tcl
+16 −1		mflowgen/common/power-domains/outputs/upf_Tile_Mem.tcl
+16 −1		mflowgen/common/power-domains/outputs/upf_Tile_MemCore.tcl
+28 −7		mflowgen/common/power-domains/outputs/upf_Tile_PE.tcl
+5 −0		mflowgen/common/rtl/configure.yml
+2 −2		mflowgen/common/rtl/gen_rtl.sh
+4 −4		mflowgen/full_chip/construct.py
+0 −35		mflowgen/full_chip/glb_top/configure.yml
+0 −23		mflowgen/full_chip/glb_top/get_glb_top_outputs.sh
+0 −26		mflowgen/full_chip/global_controller/configure.yml
+0 −26		mflowgen/full_chip/global_controller/get_global_controller_outputs.sh
+0 −34		mflowgen/full_chip/tile_array/configure.yml
+0 −39		mflowgen/full_chip/tile_array/get_tile_array_outputs.sh
+24 −2		mflowgen/glb_tile/construct.py
+27 −3		mflowgen/glb_top/construct.py
+0 −42		mflowgen/glb_top/glb_tile/configure.yml
+0 −26		mflowgen/glb_top/glb_tile/get_glb_outputs.sh
+29 −11		mflowgen/global_controller/construct.py
+3 −0		mflowgen/global_controller/rtl/configure.yml
+1 −1		mflowgen/global_controller/rtl/gen_rtl.sh
+21 −22		mflowgen/test/test_module.sh
+0 −40		mflowgen/tile_array/Tile_MemCore/configure.yml
+0 −44		mflowgen/tile_array/Tile_MemCore/get_Tile_MemCore_outputs.sh
+0 −32		mflowgen/tile_array/Tile_PE/configure.yml
+0 −38		mflowgen/tile_array/Tile_PE/get_Tile_PE_outputs.sh
+7 −0		mflowgen/tile_array/constraints/constraints.tcl
+40 −30		mflowgen/tile_array/construct.py
+4 −0		tests/test_app/Makefile
+8 −7		tests/test_memory_core/build_tb.py
+1 −0		.github/workflows/linux.yml
+1 −1		lake/models/lake_top_model.py
+1 −1		lake/models/prefetcher_model.py
+422 −186		lake/modules/buffet_like.py
+72 −29		lake/modules/crddrop.py
+3 −3		lake/modules/crdhold.py
+1 −1		lake/modules/input_addr_ctrl.py
+36 −21		lake/modules/intersect.py
+17 −36		lake/modules/repeat.py
+394 −181		lake/modules/scanner_pipe.py
+83 −21		lake/top/fiber_access.py
+1 −1		lake/utils/util.py
+3 −0		tests/test_import_sam.py